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#The 7th Lichuang Electric Race#Balance bike based on state space

 
Overview

Topic Requirements
      The title of this paper is "Balance bike based on state space". I don't know if you know about smart bikes. Because I participated in two smart bike competitions, I have many unforgettable memories. I still remember what my senior said, "The purpose of participating in the competition is not to win awards, but to learn more." To be honest, I didn't feel anything when I was a freshman, but now I do have a deep feeling. Time flies so fast. Hey, I feel a little emotional. Topic Analysis
    This project uses TC264 and N32G430C8L7. I feel that TC264 is definitely enough, but because of participating in the training camp, I learned about the N32G430 chip, which is also a domestic product. So I have to go through it. Overall design block diagram:
Schematic diagram Design description
(1) The main control chip is
          TC264:
          ☆ Processor: TC264, with a maximum frequency of 200MHz and dual-core TriCore™ architecture;
          ☆ TriCore™ built-in DSP function;
          ☆ Program memory: Flash memory with a capacity of up to 2.5MB and ECC (error correction coding) protection;
          ☆ Data memory: RAM with up to 752KB capacity and ECC (error correction code) protection, used to store radar information and camera image information;
          ☆ 96KB EEProm, supporting 125k read and write cycles;
          ☆ 4 12-bit SAR ADC converters;
          ☆ Support 100Mbit Ethernet;
          ☆ Support FlexRay, CAN, CAN FD, LIN and SPI;
          ☆ Timer modules (GTM, CCU6, GPT12);
          ☆ High-speed serial interface for inter-processor communication;
          ☆ 2.5 GHz high-speed track port for real-time vision and radar data tracking;
          ☆ On-board integrated DAP circuit, connected to the computer via Mini USB for simulation debugging
          ☆ DAP simulation debugging interface
          ☆ DC-DC power supply chip TLE42744G V33
          ☆ 30x2, 32x1, 20x1 expansion ports
          N32G430C8L7:
          ☆ 32-bit ARM Cortex-M4 core + FPU, support DSP instructions and MPU ☆ Built-in 1KB instruction cache, support Flash acceleration unit execution program 0 wait ☆ Maximum main frequency 128MHz, 160DMIPS ☆ Up to 64KByte on-chip Flash, support encrypted storage, partition management and data protection, 10,000 erase and write times, 10 years of data retention ☆ Up to 16KByte on-chip SRAM, Stop2 mode retention, Standby mode can be configured as retention ☆ Support Run, Sleep, Stop0, Stop2, Standby mode ☆ 1 12bit 4.7Msps ADC, 12/10/8/6bits configurable, up to 16 external single-ended input channels, 3 internal single-ended input channels, support differential mode ☆ 3 high-speed comparators, built-in 64-level adjustable comparison reference ☆ HSE: 4MHz~32MHz external high-speed crystal ☆ LSE: 32.768KHz external low-speed crystal ☆ HSI: internal high-speed RC 8MHz ☆ LSI: Internal low-speed RC 40KHz ☆ MCO: Supports 2 clock outputs, configurable SYSCLK, HSI, HSE, LSI, LSE, and divisible PLL clock output ☆ Support power-on/power-off/external pin reset ☆ Support watchdog reset, software reset ☆ Support programmable voltage detection ☆ 4 U(S)ART interfaces, including 2 USART interfaces (support ISO7816, IrDA, LIN), 2 UART interfaces ☆ 2 SPI interfaces, master mode rate up to 18 Mbps, slave mode rate up to 32 Mbps, support I ☆ 2 I2C interfaces, rate up to 1 MHz, master and slave modes configurable, slave mode supports dual address response ☆ 1 CAN 2.0A/B bus interface, rate up to 1Mbps
(2) The power module
          flow chart is as follows:
                    ①Stable 5V power supply module
              In the design of 5V power supply module, we adopt the DC-DC power supply solution, using TI's switching power supply chip TPS7350 to generate 5V voltage to power the sensor. The ceramic bypass capacitor in the circuit can improve the transient response and noise suppression of the load.
          ②Stable 3.3V power supply module
              This part of the circuit is powered by the 3.3V voltage regulator chip RT9013, and the core board is also powered by this chip. Its input and output ends are filtered by non-polar capacitors.
                                                                                                   ③Motor drive module
       The motor driver uses MOS tubes to build an H-bridge circuit and uses the full-bridge driver HIP4082 to drive. HIP4082 is a driver chip from Intersil. Its maximum output voltage can reach 80V, the output current reaches 1.3A, and the input PWM frequency can reach up to 200Khz. A HIP4082 with peripheral circuits to form an H-bridge can drive one motor. It has the characteristics of large output current and convenient design, which fully meets the needs of loaded motors.
           Its working principle is as follows: turn on Q1 and Q4, turn off Q2 and Q3, then the current can pass through Q1, motor M, and Q4 to complete the forward rotation of the motor. As shown in Figure 5.2. Turn on Q2 and Q3, turn off Q1 and Q4, then the current can pass through Q2, motor M, and Q3 to complete the reverse rotation of the motor.
PCB design instructions
20mil line width -> 1A current, 0.5mm via -> 1A current
In the schematic check option, modify the floating network and single-ended network to fatal errors, and then compile;
do not punch holes on the pad, which is prone to tin leakage and tombstones;
the benefits of fan holes: 1) shorten the return path; 2) punch holes to occupy space;
stitch the ground vias to reduce the return path, and wrap the antenna part with ground vias; (the same applies to the crystal oscillator)
When adjusting the silk screen, just open the silk screen layer, solder mask layer, and board frame layer;
electrolytic capacitors filter low-frequency signals, monolithic capacitors and ceramic capacitors filter high-frequency signals;
TPS7350 has a small voltage difference and a maximum current of 500ma;
power switching device MOSFET, the switching speed can reach KHz to MHz:
After the PCB is completed, be sure to remember the DRC check;
bypass capacitor: aluminum electrolytic capacitors and tantalum capacitors are more suitable as bypass capacitors, generally 10~470μ F mu FμF
active crystal oscillators require external power supply, and passive crystal oscillators only need to connect 2 crystal oscillator pins.
Software Description
The following program is a module test program
#include "headfile.h" #pragma section all "cpu0_dsram" //Put the global variables between this statement and the #pragma section all restore statement in the RAM of CPU0 uint16 duty; //Define the servo duty cycle control variable uint16 speed1,count;//Define the motor duty cycle control variable and encoder count variable

//After the project is imported into the software, you should select the project and click refresh to refresh it before compiling//The project is set to close optimization by default. You can right-click the project and select properties->C/C++ Build->Setting//Then find C/C++ Compiler->Optimization->Optimization level in the right window to set the optimization level//Generally, the newly created project will open level 2 optimization by default, so you can also set it to level 2 optimization

//For the TC series, interrupt nesting is not supported by default. If you want to support interrupt nesting, you need to use enableInterrupts(); in the interrupt to enable interrupt nesting//To put it simply, after entering the interrupt, the TC series hardware automatically calls disableInterrupts(); to refuse to respond to any interrupt, so we need to manually call enableInterrupts(); to enable the interrupt response. int core0_main(void){ get_clk();//Get the clock frequency. Be sure to keep it. //Users call various initialization functions here. //duty = 750; count = 2000; gtm_pwm_init(ATOM1_CH1_P33_9,50,duty);//Servo PWM interface initialization ips114_init();//ips1.14 inch screen initialization //mt9v03x_init();// gpt12_init(GPT12_T2,GPT12_T2INB_P33_7,GPT12_T2EUDB_P33_6);//Encoder initialization gtm_pwm_init(ATOM0_CH6_P02_6,17*1000,count);//Motor PWM interface initialization

    //Wait for all cores to be initialized IfxCpu_emitEvent(&g_cpuSyncEvent); IfxCpu_waitEvent(&g_cpuSyncEvent, 0xFFFF); enableInterrupts();

    //Note that from version V1.1.6 onwards, the information printed by printf is output from the serial port. For details, please refer to the library routine Printf_Demo. //Note that from version V1.1.6 onwards, the information printed by printf is output from the serial port. For details, please refer to the library routine Printf_Demo. //Note that from version V1.1.6 onwards, the information printed by printf is output from the serial port. For details, please refer to the library routine Printf_Demo. while (TRUE) { //Users write task code here pwm_duty(ATOM1_CH1_P33_9,duty); pwm_duty(ATOM0_CH4_P02_4,count); //if(mt9v03x_finish_flag) //{ //ips114_displayimage032(mt9v03x_image[0],MT9V03X_W,MT9V03X_H); //mt9v03x_finish_flag = 0; //} speed1=gpt12_get(GPT12_T2); gpt12_clear(GPT12_T2); ips114_showuint16(0,0,speed1); }}

#pragma section all restore

 
Physical display description
In fact, I made many versions, mainly because I wanted to try it out. Yes, if you have an idea, how can you not try it out? I won’t say more. Look at
the picture above and look at it again and again . You think it’s over, but it’s not ... Finally: The source file of the demonstration video is posted in the network disk. You can download it if you want. The link is as follows: https://lecloud.lenovo.com/share/wF14vw4HVUYNkE2C










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