DJS-08 Electronic Calculator

This project is a DIY simple 8-bit CPU project.
 
Basic CPU performance:
Speed: 1Hz-2.048MHz, 3T-5T single cycle, most instructions are 5T, a few are 3T (equivalent to 400,000 additions per second)
ROM: 64KB (or 32KB)
RAM: 64KB
Bus and ALU bit width: 8
Instruction length (with immediate value): 16
Pointer stack: 4-level 16bit
Hardware interrupt: single-level, 255 vector half interrupt (Note: some instructions are not supported in the interrupt function)
Graphics card: None
Keyboard: None
External bus: 8080 timing, 64KB
 
The structural block diagram is as follows:
This architecture refers to the 8008 CPU released by Intel in 1972, using a single internal bus, the instruction set is basically based on 8008, the operation and logic instructions are similar, and there are 4 flag registers.
Since the original 8008 uses CDIP-18 package and has tricky timing, this design first separates the address line and data line of the external bus, and then expands the 16KB addressing range to 64KB+64KB Harvard structure, but does not support jumping to RAM for execution during program execution.
 
This design mainly consists of the following parts:
    1. Clock oscillator and reset circuit
        The clock source part uses four sources, namely: 1Hz low frequency generated by 7556, 25Hz low frequency, manual button signal, 2.048MHz high frequency clock source generated by 8224, and can be switched arbitrarily in the hardware circuit. The reset circuit has a power-on reset function. Since there is HLT (stop) in the instruction, the board comes with a READY button for easy debugging.
      2. Arithmetic unit (ALU)
        ALU uses the N8260 arithmetic unit of Signetics, which has three arithmetic functions: full addition, AND gate, and XNOR. With the assistance of the external 74LS86 XOR gate and 74LS153 MUX, it has subtraction, XOR, logical shift, comparison and other functions. ALU sets up a separate AB register, which has no connection with the AB register on the main register stack. There are four FLAGs: CF SF ZF PF. When there is a carry in addition or a borrow in subtraction, CF<=1; when the output number is 0x00/00000000, ZF<=1; when the highest bit/sign bit of the output is 1, SF<=1; when there are an even number of 1s in the output 8 bytes, PF<=1.
      3. Register stack
      ABCDEFXY 8 general registers without special functions, P register (internal RAM pointer), internal RAM mapping, DPTRH, DPTRL, INDEX three registers, pointing to external RAM unit, pointer calculation formula: 256*DPTRH + DPTRL + INDEX, external RAM mapping (read and write operations are the same as internal registers), PC register (two registers but one mapping, two 8-bit write 16-bit operations are realized through blocking series connection), input port mapping only, AF register bidirectional IO port mapping (similar to the IO port address mapping of 51 single-chip microcomputer)
      4. PC program counter and pointer stack
       can realize addressing operation of 0000-FFFF, and PC+1 is obtained for each 8-bit program instruction. When the JMP instruction is executed, the high and low 8 bits of the PC register are pushed into the PC, and the original 16-bit process is discarded. In CAL, the high and low 8 bits of the PC are pushed into the PC, and the 16-bit process in the original PC is pushed into the pointer stack. In the RET instruction, the top 16-bit data of the pointer stack is pushed into the PC, and the original process in the PC is discarded.
      5. External interrupt controller
        A very imperfect interrupt mechanism, can only do some simple operations, no register status recovery, no PSW save and restore, it is not recommended to use
      6. The controller
   is composed of 4 GAL16V8/ATF16V8 controllers, with a simple structure, details omitted
 
Instruction set:
NOP idle run
HLT shutdown
HLTDMA (DMA controllable shutdown)
ADD/ADC/ADDI/ADCI (addition/full addition with/without immediate data)
SUB/SBC/SUBI/SBCI (subtraction with/without immediate data/subtraction with borrow)
NXR/NXRI
XOR XOR
AND/ANDI Bitwise AND
CMP/CMPI comparison
RR/RL Right shift/left shift with 0 complement
RRC/RLC Right shift/left shift with carry complement
JMP/JMC/JNC/JMZ.... (jump/jump when CF=1/jump when CF=0.... other flags are similar)
CAL/CLC/CNC/CLZ.... (sub-function call/call when CF=1/call when CF=0.... other flags are similar)
RET/RTC/RNC/RTZ.... (sub-function return/return when CF=1/return when CF=0.... other flags are similar)
 
There is no assembler at present. The machine code structure is shown in PDF and the figure above. This instruction set is very friendly to handwritten assembly.
 
Note:
        1. The project is still in progress and not all hardware functions and instruction sets have been tested. The open source will continue to be improved in the future
        . 2. Although the project is marked as the standard version, the PCB file is in the professional version (see the backup compressed package in the attachment), so please use the EasyEDA professional version to import and open it. This file is the final finished PCB file! ! !
        3. The current version uses many devices that have been discontinued for more than 40 years. Some devices are difficult to purchase. Please refer to it with caution!
 
PCB preview:
 
Physical image:
 
 
Sample code in power-on test:
 
Display "HELLO WORLD!" on LCD1602. The specific mapping addresses are as follows write cmd 0xff00 write data 0xff02 read cmd 0xff01 read data 0xff03
 
The startup code of LCD write command is as follows: 0x38 0x0c 0x06 0x01
 
The data and address to be written are as follows (address--the data written at this address). Before writing each data, you need to enter the address. Write address with write instruction operation, write data with write data operation 80--48 81--4582--4c83--4c84--4f85--2086--5787--4f88--5289--4c8a--448b--21 (these ASCII codes together are "HELLO WORLD!" including spaces)
The following is the code: ****Clock frequency 1.33MHz (using 12MHz crystal)*****
MOVI H 0xff // 1C FFMOVI L 0x00 // 1C 00---------------------------------------- --MOVI A , 0x38 // 10 38MOVI PC 0x01 // 19 01MOVI PC 0x40 // 19 40CAL // E1 FFMOVI A , 0x0c // 10 0CMOVI PC 0x01 // 19 01MOVI PC 0x40 // 19 40CAL // E1 FFMOVI A , 0x06 // 10 0CMOVI PC 0x01 // 19 01MOVI PC 0x40 // 19 40CAL // E1 FFMOVI A , 0x01 // 10 01MOVI PC 0x01 // 19 01MOVI PC 0x40 // 19 40CAL // E1 FF--------------------------------------------------MOVI A 0x80 / / 10 80MOVI B , 48 // 11 48MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 45 // 11 45MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 4c // 11 4CMOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 4c // 11 4CMOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 4f // 11 4FMOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FF--------------------------------- ---MOVI B, 00 // 11 00MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FF----------------------- -------------MOVI B , 57 // 11 57 MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 4f // 11 4F MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 52 // 11 52MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 4c // 11 4CMOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 44 // 11 44MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FFMOVI B , 21 // 11 21MOVI PC 0x01 // 19 01MOVI PC 0x00 // 19 00CAL // E1 FF-------------------------- ------------------------------HLT // FFFF
(.org 0x0100) Write data sub-function MOVI PC 0x01 // 19 01MOVI PC 0x40 // 19 40CAL // E1 FFMOVI IDX , 0x02 // 18 02MOV RAM, B // 90 F1ADDI A, 0x01 // 20 01MOVI PC, 0x01 // 19 01MOVI PC, 0x20 // 19 20CAL // E1 FFRET // E2 FF
(.org 0x0120) Write read busy + wait busy sub-function MOVI IDX 0x01 // 18 01MOV D , RAM // 90 3FADDI D , 0x80 // 23 80JMPC // E0 80RET // E2 FF
(.org 0x0140) Write command sub-function MOVI IDX 0x00 // 18 00MOV RAM , A // 90 F0MOVI PC , 0x01 // 19 01MOVI PC , 0x20 // 19 20CAL // E1 FFRET // E2 FF
 
 
Updated on July 20, 2023: Uploaded a semi-finished compiler using C language. No need to type machine code by hand, see the attached file: asm~DJS08.zip
 
To be continued...