MSPM0G3507SPTR Core Board

This core board is based on the MSPM0G3507SPTR (LQFP-48 package) and is suitable for the National Undergraduate Electronic Design Contest.
Interface section:
       Almost all pins are exposed (except for some pins, such as the crystal oscillator), with 2*12pin dual-row headers. The power connectors at the headers have hardware reverse connection protection.
       An external 8-pin power pin is provided for powering peripherals; this pin does not have overcurrent or reverse connection protection, so ensure correct connection. The 3V3 power supply is provided by an LDO (RT9013), whose maximum output current is 500mA (source: chip datasheet), but it is recommended not to exceed 200mA, as excessive current can cause overheating.
       A DAPLINK interface is reserved for programming and debugging.
       An onboard CH340E chip allows communication with a host computer via the onboard Type-C interface.
Onboard resources:
        tri-color LED, reset button, BSL button, and one user button. Peripherals are basically compatible with the official examples; only I/O reconfiguration in SYSCONFIG is required. Further expansion boards and example modifications
        suitable for signal/control problems will be released later .        August 26, 2024: Replaced the original serial port chip CH340N with CH340E.