Zynq base plate

Special thanks:
Thank you all for your help. Without your assistance and answers, I would not have been able to complete this project. I am very grateful.
 
Regarding the hardware, this core board does not have a boot pin, so it's impossible to change the boot mode.
The BOM is definitely faulty, so it cannot be soldered according to the BOM.
Also, the parts I pasted myself haven't sold yet. I'm currently in freshman year military training and don't have time. I'll probably ship them once a club takes me in (I'm very poor, extremely poor qwq).
 
Regarding the boot mode, you can short-circuit the SD boot section to boot from the SD card; the default is QSPI.
 
 
 
As shown in the diagram, there is one gigabit network, one HDMI, one USB power supply supporting fast charging, one USB to serial port, one USB, one SD card, three push-button switches, four LEDs, one 40-pin FPC socket, with the remaining pins brought out by a 2.54mm header on top, and a 2.0mm header on the right leading out to bank 13 of the 7020, and one CAN bus.
 
The power supply
uses a CH224 for fast charging decoy. The output voltage diagram includes a resistance table, which is inspired by the open-source project kill-star_sx; thanks to them.
 
A ZXDN10S1205SAW step-down converter is used to reduce the voltage to around 5V, which is then converted to 3.3V and 1.8V via an 1117.
The 3.3V powers peripherals, while the 1.8V powers only the input section of the TXS02612. Because routing long cables for the SD card is problematic (a CH340 disconnection issue occurred in the first version), another 1117 was used near the SD card to reduce the voltage to 3.3V.
 
A 50MHz active crystal oscillator is onboard. It's not brought out in 34_13_p or 34_13_n
 
because the core board's serial port is not frequently used; a separate CH340 serial port was created, but the PL section for the serial port requires MIO configuration.
 
The SD card is as shown in the picture, nothing much to say. I see that almost all mining rigs use this solution.
 
The gigabit network speed here, with the PHY chip on the core board, is decent, reaching around 800-900 Mbps. The
 
 
CAN bus is just like that; I haven't used it this way before, so there's not much to say.
 
I didn't solder the TPS2051BDBVR on the HDMI cable; I couldn't buy it and it was too expensive
 
, so I couldn't afford it. That's about it.
(Added 2023/9/7: Actual product photos
1. As shown, 7010 (left) 7020 (right). I didn't buy the core board of the model in the datasheet; I'm too poor to afford it.
2. Removed a capacitor that conflicted with the BT slot.)
2023/11/26
1. Corrected the silkscreen markings on the left-side button pins of the PCB (previously incorrect). PCB version -> v2.9
2. Modified the pin markings on the fourth page of the schematic for the LCD screen section (previously incorrect). Schematic version -> v1.94
3. Added the schematic diagram below (32478yf4780gf72r49fg4) to the attachments; thanks to the user.
2024/3/7
1. Made the H35 differential pins on the top of the PCB equal in length. PCB version -> v3.9
2. Modified the SD startup section in the main text.
2024/3/10
As shown in the image, the TDO waveform was captured at a JTAG clock frequency of 3750000HZ,
so a new board was copied. V4.5
1. Modified the positions of the JTAG and LCD sockets, shortened the JTAG line length, and modified the single-ended impedance to 50Ω.
2. Deleted the CN17 socket, keeping only XS5 for connecting the programmer.
3. The LCD screen has approximately equal-length wires wound around it.
4. A step-down module is used to provide 3.3V power.