TOPSwitch--Ⅱ

The pin arrangement of TOPSwitch--Ⅱ is as shown in the figure. It is available in three packaging forms. Among them, the TO-220 package comes with a small heat sink and is a typical three-terminal device. Its appearance is the same as the 7800 series three-terminal linear regulator. DIP-8 package and SMD-8 package each have 8 pins, but both can be simplified to 3; the difference between the two is that DIP-8 can be equipped with an 8-pin IC socket, while SMD-8 is a surface mount chip and does not Requires drilling and welding. The three pins of TOPSwitch--Ⅱ are control terminal C (Control), source S (Source), and drain D (Drain). Among them, the control terminal has four functions: (1) Use the size of the control current Ic to adjust the duty cycle D. When Ic decreases from 6.0mA to 2.0mA, D increases from 1.7% to 67%, and the proportional coefficient (i.e. Pulse width modulation gain) is K=ΔD/ΔC=(1.7%-67%)/6.0mA-2.0mA=-16.3%mA≈-16%mA (2) Connected to the internal parallel regulator/error amplifier, it can The chip provides the bias current required for normal operation; (3) This terminal also serves as the connection point between the power supply branch and the automatic restart/compensation capacitor. The frequency of automatic restart is determined by connecting an external bypass capacitor; (4) Compensation of the control loop . The typical value of the control voltage Uc should be 5.7V, the limit voltage UCM=9V, and the maximum allowable current of the control terminal, ICM=100mA. The drain is connected to the drain of the on-chip power switch, and the drain-source breakdown voltage U(BR)DS≥700V. The source S is connected to the source of the internal power switch and is also connected to the small heat sink (only for the TO--220 package), which serves as the common ground of the primary circuit. For both DIP-8 and SMD-8 packages, 6 S terminals are designed, and they are connected internally. The difference is that the three S terminals on the left serve as signal ground and are connected to the negative pole of the bypass capacitor, while the three S terminals on the right are called high voltage return terminals (HV RTN), which is the power ground. When installing the printed boards, they should be welded to different locations in the ground area to avoid interference on the control end caused by the voltage drop caused by large currents passing through the power ground wire. The internal block diagram of TOPSwitch--Ⅱ is shown in the figure below, which mainly includes 10 parts: (1) control voltage source; (2) bandgap reference voltage source; (3) oscillator; (4) parallel regulator/error amplifier; (5) Pulse width modulator; (6) Gate driver stage and output stage; (7) Overcurrent protection circuit; (8) Overheating protection and power-on reset circuit; (9) Shutdown/automatic restart circuit; (10 ) high voltage current source. In the figure, Zc is the dynamic impedance of the control terminal; RE is the error voltage detection resistor; RA and CA form a low-pass filter with a cut-off frequency of 7kHz. The basic principle of TOPSwitch--Ⅱ is to use the feedback current Ic to adjust the duty cycle D to achieve the purpose of voltage stabilization.