Wide Input Voltage DCDC Conversion Using Current Mode Control

    Current-mode control (CMC) is a very popular DC-DC converter loop architecture, and for good reason. Simple operation and dynamics can be achieved even when two loops—a broadband current loop lurking within an outer voltage loop—are required. Peak, valley, average, hysteresis, constant on-time, constant off-time, and analog current mode control are available. Each technique offers advantages related to the overall design.

    In the first of this two-part series, we highlighted the fundamentals of loop stability in fixed-frequency, naturally sampled, peak current-mode, buck-derived converters, particularly for industrial and automotive applications. After briefly reviewing the operating principles of the peak-and-valley current-mode architecture, we presented a small-signal model for peak current-mode control, including control-output transfer function details and current-loop design, including slope compensation terms. Readers interested only in current-mode control loop compensation should refer to the following Part 2, which features an example.

    Use a commercially available DC-DC regulator.

    Current mode control scheme

    Among the various forms of current-mode control, peak current-mode control with slope compensation is the most widely used, with widespread adoption by power management IC manufacturers and power supply equipment suppliers. Factors contributing to the popularity of peak current-mode control include its straightforward compensation, inherent cycle-by-cycle overcurrent protection, automatic input voltage feedforward, and ease of implementing multi-stage scalability for current sharing. Disadvantages include current loop noise sensitivity and minimum switching on-time limitations, particularly in non-isolated converters with high step-down ratios.

    Emulation architectures mitigate these drawbacks to some extent. Valley current mode control, on the other hand, has poor line feedforward characteristics and requires difficult slope compensation. Hysteretic control, on the other hand, offers good transient response but also varies the switching frequency across line and load, making electromagnetic interference (EMI) filtering more difficult.

    Meanwhile, average current mode control, suited to its high current loop gain, is an ideal current source for a wide range of applications, including PFC boost pre-regulators and battery charging circuits, benefiting from improved noise immunity when avoiding ramps and better compensation requirements for discontinuous conduction mode (DCM) operation. However, the need to compensate for both loops hinders its wider use.

    Overview of Peak-Valley Current Mode Control

    The converter in Figure 1 represents a single-phase buck topology operating in continuous conduction mode (CCM). Note that the filter inductor DCR and output capacitor equivalent series resistance (ESR) are explicitly shown. Other buck-derived power stage topologies include multiphase buck, isolated forward, and full-bridge.

    Bridges, and voltage-fed push-pull circuits can be substituted here while maintaining a similar loop configuration (except for feedback isolation.)

    In this peak or valley current mode configuration, the state of the inductor current is naturally determined by the PWM comparator. The outer voltage loop employs a type II compensation circuit and a conventional operating circuit. The transconductance error amplifier (EA) is shown with its inverting input, labeled the feedback (FB) node, connected to

    to the feedback resistors Rfb1 and Rfb2.

    A compensated error signal appears at the EA output, labeled COMP, of the outer voltage loop, thus providing a reference command to the inner current loop. COMP effectively represents the programmed inductor current level. The current loop transforms the inductor into a quasi-ideal voltage-controlled current source: one approach is to remove the inductor from the outer loop dynamics, at least at DC and low frequencies.

    The schematic in Figure 1 positions the current sensor after the inductor. This implementation can be a discrete shunt resistor, or use the MOSFET state resistance or inductor DCR. Similarly, co-integrating the MOSFET and controller—using a single chip or multiple chips co-packaged in a multi-chip module—facilitates lossless current sensing. In any case, the equivalent linear gain is given by Equation 1.

    Ri = Gi Rs [W ] (1)

    Where Gi is the gain of the current sense amplifier (if used), and Rs is the gain of the current sensor. A perfect current-mode converter only senses the DC current, or the average value of the inductor current. In practice, a current-mode implementation suffers from sampling errors in the average inductor current. Such errors manifest as subharmonic oscillations in the current loop valleys at duty cycles greater than or less than 50%, respectively. Slope compensation is a well-known and widely used technique for adding a ramp to the sensed inductor current to avoid the risk of subharmonic oscillations.

    Figure 2a illustrates how the turn-on command is activated when the clock edge sets the PWM latch. The turn-off command level appears when the sensed inductor current peak plus the slope compensation ramp reaches COMP, which resets the PWM latch. This is called trailing edge modulation. Se is

    The external slope compensation ramp slope and Sn, Sf are the sensed on-time and shutdown slope current signals.

    Similarly, Figure 2b shows the equivalent waveforms and timing modulation for valley current-mode control with leading edge modulation. Note that the S and R inputs of the PWM latch in Figure 1 must be connected appropriately for the specific implementation.

    Achieving Wide V IN Performance Using the DC/DC Converter's Control Loop

    The structure of a current-mode control loop, including a bandgap reference, error amplifier, and PWM comparator, is very similar to that of a voltage-mode control loop. The fundamental difference lies in the addition of an inner wide-bandwidth current loop. Peak, valley, and emulated current-mode techniques are well-proven and established, resulting in simple operation and dynamics. The following are the key benefits:

    1. Use relatively simple loop compensation for accurate output regulation;

    2. Better line transient suppression through automatic input voltage feed-forward;

    3. High step-up/step-down conversion ratio from a wide duty cycle operating range;

    4. Cycle-by-cycle current limiting of instantaneous MOSFET current makes the design simpler and more reliable;

    5. True boost converter startup and short-circuit fault protection are achieved by disconnecting the input and output.

    In fact, current-mode control offers the opportunity to meet other performance goals, such as multiphase current sharing/stackability, load current telemetry reporting, and EMC compliance. Regarding the latter, the fixed switching frequency of most types of current-mode control simplifies EMI filter design, making it easier to comply with EMC directives mandated by various issuing agencies. Regulatory compliance is clearly an increasingly important benchmark for power solutions.

    Summarize:

    Understanding the operation of a current-mode controlled DC-DC converter is an important first step for any designer looking to apply current-mode control. This article examines the specific properties of peak- and valley-current-mode architectures. Additionally, a small-signal model is presented illustrating the key considerations necessary to gain useful insights into designing a converter using peak- and valley-current-mode control.