Dynamic testing confirms the accuracy of SiC switching frequency

Wide-bandgap materials such as silicon carbide (SiC) and gallium nitride (GaN) have taken a leading position in power electronics applications due to their proven electrical properties that outperform silicon. While this is widely accepted, experts are still examining its validity.

SiC MOSFETs, in particular, are used in converters operating at high temperatures and switching frequencies. However, as switching speeds increase, the effects of parasitic inductance and operating temperature also increase (more precisely, transconductance is the primary temperature-sensitive parameter). Therefore, analyzing switching behavior is crucial in every MOSFET power module design.

There are various analytical techniques available for evaluating the switching behavior of these semiconductors. However, the focus here will be on analytical models, which use basic mathematical equations to describe the switching behavior. From an implementation perspective, part of the advantage of this approach lies in its time-saving and flexible nature.

However, its accuracy depends on the equations used to describe the system and how they are solved. This review examines transconductance nonlinearity through static and dynamic testing to verify the model's accuracy. Static testing measures the device's transfer characteristics under varying temperature conditions, while dynamic testing compares the expected results produced by the model with those obtained experimentally.

Model Circuit

The circuit used to analyze switching behavior (shown in Figure 1) is a double-pulse test circuit. Similar to what happens with silicon MOSFETs, the switching process of SiC MOSFETs is divided into four stages, and the differential equations for each stage are solved using Matlab's "ode45" function.

Figure 1: Double pulse test circuit

In phase 1, the application of positive voltage V drive_on charges capacitors C gd and C gs until V gs exceeds the threshold voltage (V th ). During this phase, the MOSFET is off. The following equation is satisfied:

R g · I g = V drive_on – V gs – L s · (dI g / dt) (1)

I g = C gs · (dV gs / dt) + C gd · (dV gd / dt) (2)

V gs = V gd + V ds (3)

When V gs exceeds V th in stage 2, the channel current begins to increase in proportion to (V gs – V th ). The drain current I d and the drain-source voltage V ds satisfy the following equation, where gm is the transconductance:

I d = gm · (V gs – V th ) + C gd · (dV dg / dt) + C ds · (dV ds / dt) (4)

V ds = V dc – I d · R d – (L d + L s ) · (dI d / dt) (5)

In Phase 3, when V gs reaches the Miller plateau equal to (I o / gm ) + V th , V ds begins to decrease to the value corresponding to the ON state. Simultaneously, the voltage V d across the parasitic capacitance of the diode (C d ) increases, generating a reverse recovery current in the MOSFET channel. This phase is defined by the following equation:

V ds = V dc – I d · R d – (L d + L s ) · (dI d / dt) – V d (6)

C d · (dV d / dt) = I d – I o (7)

In phase 4, Vgs increases until it reaches the value Vdrive_on. The drain current Id is expressed by the following equation, where Rds_on is the on-resistance of the MOSFET:

I d = V ds / R ds_on + C gd · (dV dg / dt) + C ds · (dV ds / dt) (8)

When it occurs in the off state, V gs begins to decrease until it reaches the Miller plateau. In the next stage, the voltage increases while the current decreases. Under the symmetry of the switching process, if V gs is greater than or equal to (V ds – V th ), the MOSFET satisfies equation (8). Otherwise, the MOSFET follows equation (4). This state can be described by the following equation:

I d = C gd · (dV dg / dt) + C ds · (dV ds / dt) (9)

The nonlinearities of capacitance and transconductance, as functions of V ds and V gs, respectively, were obtained by applying the MATLAB curve fitting tool to the values ​​shown in each device datasheet.

Experimental testing

The setup used to perform the test is shown in Figure 2, where the red dashed line represents the device under test (bare die or direct-bonded copper). During dynamic testing, the source terminal's position on the PCB can be changed, allowing different common-source inductance values ​​(S1, S2, S3, or S4) to be selected without changing the loop inductance. The same circuit can be used for static testing.

Figure 2: Test circuit diagram

Static tests were performed using different temperature values ​​to observe how the MOSFET's transconductance slightly increases at higher temperatures. Dynamic tests were performed using different inductor values ​​(Ls1, Ls2, and Ls3 in Figure 2). The experimental results were highly accurate, confirming the effectiveness of the model. In Figure 3, we can see the dynamic test waveforms (800V/40A, 30°C) representing the on and off states, respectively.

Figure 3: Dynamic test waveforms on and off

in conclusion

The proposed analytical model describes the switching behavior of MOSFETs using numerical calculations, accounting for parasitic inductance, transconductance, and capacitance nonlinearities. To examine the effects of temperature, the transfer characteristics at various junction temperatures were measured, and graphical trends were derived through curve fitting. Dynamic testing demonstrated the model's high accuracy in predicting switching behavior.