3 Ways to Improve SEPIC Performance

Simply put, a single-ended primary-inductor converter (SEPIC) can step down or boost an input voltage. For example, in automotive applications, it can be used to regulate a 12V output voltage from a 12V battery input, maintaining output voltage regulation during a 6V start/stop voltage drop and alternator surges of 16V or more. SEPICs are sometimes used to operate with multiple input sources, eliminating the need for different converters when the wall adapter output or system voltage varies. Key advantages include low cost, minimal active components (two), a simple boost controller IC, low input ripple voltage, and minimal FET ringing to reduce electromagnetic interference (EMI).

Some disadvantages include a complex control loop, right-half-plane zero, non-isolated topology, and the need to use two separate inductors or a single coupled inductor. The SEPIC is similar to a non-isolated flyback converter, but with the addition of a "flying" capacitor. In fact, if this capacitor is removed, it becomes a flyback converter with a 1:1 transformer turns ratio. Therefore, the SEPIC can be used in place of a flyback converter in certain applications. Let's take a look at some interesting SEPIC circuits.

The power dissipation in the SEPIC output rectifier increases rapidly with increasing power levels, especially at low input voltages. This is because the current in the rectifier is the sum of the input and output currents and is maximum at minimum input voltage. The ability to cool the rectifier limits the usable power level to around 30W in typical low-voltage applications. Figure 1 details a synchronous SEPIC converter implemented using a synchronous boost controller. Synchronous operation replaces the rectifier with a FET to reduce its losses, effectively allowing for more output current with the same losses. If a diode were used, the output current would be limited to 3A instead of 5A. Using synchronous rectification, efficiencies greater than 95% can be achieved.

A key point in this design is that the SEPIC has two switching nodes (TP2, TP3), rather than the single switching node of the boost. The driver for the SEPIC's synchronous FET cannot be directly connected to the boost controller's high-side driver because its source (TP3) is at a different potential than its SW pin (TP2). To drive it, a floating level shifter circuit consisting of R3/D2/C15 is added. C15 drops VIN to the same voltage as the "flying" capacitor C1, providing the correct voltage swing at Q1's gate-source. R3/D2 restores the correct gate drive offset (low = -0.5V, high = 7V).

Sometimes, multiple output voltages are needed. Figure 2 shows how to easily add a well-regulated auxiliary output voltage without the expense of an additional controller. In this example, the 3.3V output is used as feedback and is well regulated. Assuming a 0.3V diode drop, a 12V output is achieved by stacking windings on top of the 3.3V at a ratio of approximately 2.4 to 1. The SEPIC's coupled inductor must have a 1:1 turns ratio to properly balance its volt-microsecond product.

Because an additional winding is added, the ratio between the primary and the secondary connected to the "flying" capacitor (C1) must be 1:1. In this case, the primary and secondary must have the same number of turns. If C1 is connected to the center tap, the number of turns between the primary and 3.3V windings must be the same. A key advantage over a flyback is better light-load/no-load voltage regulation on the auxiliary output due to minimal FET ringing. Light-load regulation on the no-load output is often a problem with a flyback due to peak detection of secondary ringing. Additionally, lower voltage FETs can often be used in a SEPIC due to the reduced ringing. In the circuit shown in Figure 2, 10% regulation is achieved at full cross-load.

A little-known fact about the SEPIC circuit is that the average current in the secondary winding (or the output-side inductor when using a separate inductor) is equal to the output current. This makes it very easy to sense the output current indirectly. Figure 3 shows a battery charger implemented using a current-sense resistor (R4). Because the current flows out of the grounded side of R4, a fixed-gain inverting operational amplifier (op amp) configuration is used to generate a positive current-sense feedback signal (current). The output voltage and current information are ORed together to create a seamless transition between constant-current and constant-voltage curves.

In summary, the SEPIC converter offers advantages over the classic flyback. Its primary benefit is a "clamped" FET switching waveform, which reduces EMI and FET voltage stress. Other implementations include synchronization, multiple outputs, and simple ground-based output current sensing. These are just a few examples of how the SEPIC converter's performance can be improved in somewhat unconventional ways.