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MMUN2131LT1

Description
PNP SILICON BIAS RESISTOR TRANSISTOR
CategoryDiscrete semiconductor    The transistor   
File Size150KB,13 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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MMUN2131LT1 Overview

PNP SILICON BIAS RESISTOR TRANSISTOR

MMUN2131LT1 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeSOT-23
package instructionCASE 318-08, TO-236, 3 PIN
Contacts3
Manufacturer packaging codeCASE 318-08
Reach Compliance Code_compli
ECCN codeEAR99
Other featuresBUILT-IN BIAS RESISTOR RATIO 1
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)8
JEDEC-95 codeTO-236AB
JESD-30 codeR-PDSO-G3
JESD-609 codee0
Humidity sensitivity level1
Number of components1
Number of terminals3
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)240
Polarity/channel typePNP
Maximum power dissipation(Abs)0.2 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature30
transistor applicationsSWITCHING
Transistor component materialsSILICON
MMUN2111LT1 Series
Preferred Devices
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
Features
http://onsemi.com
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
PIN 1
BASE
(INPUT)
R1
R2
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel.
Pb−Free Packages are Available
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
MARKING
DIAGRAM
3
1
2
SOT−23
CASE 318
STYLE 6
1
A6x M
G
G
A6x
x
M
G
= Device Code
= A
L (Refer to page 2)
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction-to-Ambient
Thermal Resistance,
Junction-to-Lead
Junction and Storage,
Temperature Range
Symbol
P
D
Max
246 (Note 1)
400 (Note 2)
2.0 (Note 1)
3.2 (Note 2)
508 (Note 1)
311 (Note 2)
174 (Note 1)
208 (Note 2)
−55
to +150
Unit
mW
mW/°C
°C/W
°C/W
°C
ORDERING INFORMATION
Device
MMUN21xxLT1
MMUN21xxLT1G
MMUN21xxLT3
MMUN21xxLT3G
Package
SOT−23
SOT−23
(Pb−Free)
SOT−23
Shipping
3000/Tape & Reel
3000/Tape & Reel
10000/Tape & Reel
R
qJA
R
qJL
T
J
, T
stg
SOT−23 10000/Tape & Reel
(Pb−Free)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Preferred
devices are recommended choices for future use
and best overall value.
©
Semiconductor Components Industries, LLC, 2008
December, 2008
Rev. 9
1
Publication Order Number:
MMUN2111LT1/D

MMUN2131LT1 Related Products

MMUN2131LT1 MMUN2134LT1 MMUN2133LT1 MMUN2132LT1 MMUN2130LT1 MMUN2116LT1 MMUN2115LT1 MMUN2114LT1 MMUN2113LT1
Description PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR PNP SILICON BIAS RESISTOR TRANSISTOR
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Maker ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23
package instruction CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN CASE 318-08, TO-236, 3 PIN
Contacts 3 3 3 3 3 3 3 3 3
Manufacturer packaging code CASE 318-08 CASE 318-08 CASE 318-08 CASE 318-08 CASE 318-08 CASE 318-08 CASE 318-08 CASE 318-08 CASE 318-08
Reach Compliance Code _compli _compli _compli _compli _compli not_compliant _compli _compli _compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Other features BUILT-IN BIAS RESISTOR RATIO 1 BUILT-IN BIAS RESISTOR RATIO 2.136 BUILT-IN BIAS RESISTOR RATIO 10 BUILT-IN BIAS RESISTOR RATIO 1 BUILT-IN BIAS RESISTOR RATIO 1 BUILT-IN BIAS RESISTOR BUILT-IN BIAS RESISTOR BUILT-IN BIAS RESISTOR RATIO 4.7 BUILT-IN BIAS RESISTOR RATIO 1
Maximum collector current (IC) 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A
Collector-emitter maximum voltage 50 V 50 V 50 V 50 V 50 V 50 V 50 V 50 V 50 V
Configuration SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE) 8 80 80 15 3 160 160 80 80
JEDEC-95 code TO-236AB TO-236AB TO-236AB TO-236AB TO-236AB TO-236AB TO-236AB TO-236AB TO-236AB
JESD-30 code R-PDSO-G3 R-PDSO-G3 R-PDSO-G3 R-PDSO-G3 R-PDSO-G3 R-PDSO-G3 R-PDSO-G3 R-PDSO-G3 R-PDSO-G3
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0 e0
Number of components 1 1 1 1 1 1 1 1 1
Number of terminals 3 3 3 3 3 3 3 3 3
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 240 240 240 240 240 240 240 240 240
Polarity/channel type PNP PNP PNP PNP PNP PNP PNP PNP PNP
Maximum power dissipation(Abs) 0.2 W 0.2 W 0.2 W 0.2 W 0.2 W 0.2 W 0.2 W 0.2 W 0.2 W
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
surface mount YES YES YES YES YES YES YES YES YES
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn80Pb20) Tin/Lead (Sn80Pb20) Tin/Lead (Sn80Pb20) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30 30 30 30 30 30
transistor applications SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING
Transistor component materials SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON
Humidity sensitivity level 1 1 1 1 1 - - - 1
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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