Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ranges
at Ta =
40
to +105C, VSS = 0 V
Parameter
Supply voltage
Input voltage
Input high-level voltage
Input low-level voltage
Recommended external
resistor
for RC oscillation
Recommended external
capacitor
for RC oscillation
Guaranteed range of RC
oscillation
External clock operating
frequency
External clock duty cycle
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
High-level clock pulse width
Low-level clock pulse width
Rise time
Fall time
INH switching time
Symbol
VDD
VDD1
VDD2
VIH1
VIH2
VIL1
VIL2
Rosc
VDD
VDD1
VDD2
CE, CL, DI, INH
OSC external clock operating mode
CE, CL, DI, INH
OSC external clock operating mode
OSC RC oscillator operating mode
39
Cosc
OSC RC oscillator operating mode
1000
fosc
fCK
DCK
tds
tdh
tcp
tcs
tch
tH
tL
tr
tf
tc
OSC RC oscillator operating mode
OSC external clock operating mode
[Figure 4]
OSC external clock operating mode
[Figure 4]
CL, DI
[Figure 2] [Figure 3]
CL, DI
CE, CL
CE, CL
CE, CL
CL
CL
CE, CL, DI
CE, CL, DI
INH, CE
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 2] [Figure 3]
[Figure 5]
10
19
19
30
160
160
160
160
160
160
160
160
160
38
38
50
76
76
70
pF
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
kΩ
0.4VDD
0.4VDD
0
0
Conditions
Ratings
min
4.5
2/3VDD
1/3VDD
typ
max
6.0
VDD
VDD
6.0
VDD
0.2VDD
0.2VDD
Unit
V
V
V
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
www.onsemi.com
2
LC75836WS-T
Electrical Characteristics
for the Allowable Operating Ranges
Parameter
Hysteresis
Input high-level
current
Input low-level
current
Output high-level
voltage
Symbol
VH
IIH1
IIH2
IIL1
IIL2
VOH1
VOH2
VOH3
Output low-level
voltage
VOL1
VOL2
VOL3
Output middle-level
voltage *1
VMID1
VMID2
VMID3
VMID4
Oscillator frequency
Current drain
fosc
IDD1
IDD2
Pin
CE, CL, DI, INH
CE, CL, DI, INH
OSC
CE, CL, DI, INH
OSC
S1 to S35
COM1
to COM4
P1 to P4
S1 to S35
COM1
to COM4
P1 to P4
S1 to S35
S1 to S35
COM1
to COM4
COM1
to COM4
OSC
VDD
VDD
VI = 6.0 V
VI = VDD external clock
operating mode
VI = 0 V
VI = 0 V external clock
operating mode
IO =
20 A
IO =
100 A
IO =
1
mA
IO = 20
A
IO = 100
A
IO = 1 mA
1/3 bias IO = ±20
A
1/3 bias IO = ±20
A
1/3 bias IO = ±100
A
1/3 bias IO = ±100
A
RC oscillator operating mode
Rosc = 39 kΩ, Cosc = 1000 pF
Power-saving mode
VDD = 6.0 V output open
RC oscillator operating mode
fosc = 38 kHz
VDD = 6.0 V output open
External clock operating mode
fCK = 38 kHz
VIH2 = 0.5VDD
VIL2 = 0.1VDD
2/3VDD
0.9
1/3VDD
0.9
2/3VDD
0.9
1/3VDD
0.9
30.4
38
Conditions
Ratings
min
typ
0.03VDD
5.0
5.0
5.0
5.0
VDD
0.9
VDD
0.9
VDD
0.9
0.9
0.9
0.9
2/3VDD
+0.9
1/3VDD
+0.9
2/3VDD
+0.9
1/3VDD
+0.9
45.6
10
350
700
A
450
900
V
V
A
A
max
Unit
V
V
kHz
IDD3
VDD
Note: *1 Excluding the bias voltage generation divider resistors built in the VDD1 and VDD2. (See Figure 1.)
VDD
VDD1
To the common and segment drivers
VDD2
Except these resistors.
VSS
Figure 1
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
3
LC75836WS-T
1. When CL is stopped at the low level
CE
VIH1
VIL1
tH
CL
VIH1
50%
VIL1
tL
tr
tf
tcp
tcs
tch
DI
VIH1
VIL1
tds
tdh
Figure 2
2. When CL is stopped at the high level
CE
VIH1
VIL1
tL
CL
tf
DI
tds
tH
VIH1
50%
VIL1
tr
VIH1
VIL1
tcp
tcs
tch
tdh
Figure 3
3. OSC pin clock timing in external clock operating mode
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