L4972A
2A SWITCHING REGULATOR
1
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Features
2A OUTPUT CURRENT
5.1V TO 40V OUTPUT VOLTAGE RANGE
0 TO 90% DUTY CYCLE RANGE
INTERNAL FEED-FORWARD LINE REG.
INTERNAL CURRENT LIMITING
PRECISE 5.1V ± 2% ON CHIP REFERENCE
RESET AND POWER FAIL FUNCTIONS
INPUT/OUTPUT SYNC PIN
UNDER VOLTAGE LOCK OUT WITH
HYSTERETIC TURN-ON
PWM LATCH FOR SINGLE PULSE PER
PERIOD
VERY HIGH EFFICIENCY
SWITCHING FREQUENCY UP TO 200KHz
THERMAL SHUTDOWN
CONTINUOUS MODE OPERATION
Figure 1. Packages
PowerDIP20 (16+2+2)
SO20
Table 1. Order Codes
Part Number
L4972A
L4972AD
L4972AD013TR
Package
DIP20 (16+2+20)
SO20
SO20 in Tape & Reel
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Description
The L4972A is a stepdown monolithic power
switching regulator delivering 2A at a voltage vari-
able from 5.1 to 40V.
Realized with BCD mixed technology, the device
Figure 2. Block Diagram
uses a DMOS output transistor to obtain very high
efficiency and very fast switching times. Features
of the L4972 include reset and power fail for micro-
processors, feed forward line regulation, soft start,
limiting current and thermal protection. The device
is mounted in a Powerdip 16 + 2 + 2 and SO20
large plastic packages and requires few external
components. Efficient operation at switching fre-
quencies up to 200KHz allows reduction in the
size and cost of external filter component.
May 2005
Rev. 3
1/22
L4972A
Table 2. Pin Description
N°
1
2
3
4
Pin
BOOTSTRAP
RESET DELAY
RESET OUT
RESET INPUT
Function
A C
boot
capacitor connected between this terminal and the output allows to drive
properly the internal D-MOS transistor.
A C
d
capacitor connected between this terminal and ground determines the reset
signal delay time.
Open Collector Reset/power Failand the output voltages are safe. Signal Output.
This output is high when the supply
Input of Power Fail Circuit. The threshold is 5.1V. It may be connected via a divider
to the input for power fail function. It must be connected to the pin 14 an external
30KΩ resistor when power fail signal not required.
Common Ground Terminal
A series RC network connected between this terminal and ground determines the
regulation loop gain characteristics.
Soft Start Time Constant. A capacitor is connected between the sterminal and
ground to define the soft start time constant.
The Feedback Terminal of the Regulation Loop. The output is connected directly to
this terminal for 5.1V operation; It is connected via a divider for higher voltages.
Multiple L4972A’s are synchronized by connecting pin 10 inputs together or via an
external syncr. pulse.
Unregulated Input Voltage.
Not Connected.
5.1V V
ref
Device Reference Voltage.
Internal Start-up Circuit to Drive the Power Stage.
R
osc
. External resistor connected to ground determines the constant charging
current of C
osc
.
C
osc
. External capacitor connected to ground determines (with R
osc
) the switching
frequency.
Regulator Output.
5, 6 15,
16
7
8
9
10
11
12, 19
13
14
17
18
20
GROUND
FREQUENCY
COMPENSATION
SOFT START
FEEDBACK INPUT
SYNC INPUT
SUPPLY VOLTAGE
N.C.
V
ref
V
start
OSCILLATOR
OSCILLATOR
OUTPUT
Figure 3. Pin Connection
(Top view)
BOOTSTRAP
RESET DELAY
RESET OUT
P. FAIL INPUT
GND
GND
FREQ. COMP.
SOFT START
FEEDBACK IN.
SYNC INPUT
1
2
3
4
5
6
7
8
9
10
DIP20
20
19
18
17
16
15
14
13
12
11
OUTPUT
N.C.
C OSC
R OSC
GND
GND
Vstart
Vref
N.C.
Vi
2/22
L4972A
Table 3. Absolute Maximum Ratings
Symbol
V
11
V
11
V
20
I
20
V
I
V
4
, V
8
V
3
I
3
V
2
, V
7
, V
9
,
V
10
I
2
I
7
I
8
P
tot
T
J
, T
stg
(*) SO-20
Parameter
Input Voltage
Input Operating Voltage
Output DC Voltage
Output Peak Voltage at t = 0.1µs f = 200kHz
Maximum Output Current
Boostrap Voltage
Boostrap Operating Voltage
Input Voltage at Pins 4, 12
Reset Output Voltage
Reset Output Sink Current
Input Voltage at Pin 2, 7, 9, 10
Reset Delay Sink Current
Error Amplifier Output Sink Current
Soft Start Sink Current
Total Power Dissipation at T
PINS
≤
90°C
at Tamb = 70°C (No copper area on PCB)
Junction and Storage Temperature
Value
55
50
-1
-5
Internally Limited
65
V
11
+ 15
12
50
50
7
30
1
30
5 / 3.75(*)
1.3/1 (*)
-40 to 150
Unit
V
V
V
V
V
V
V
V
mA
V
mA
A
mA
W
W
°C
Table 4. Thermal Data
Symbol
R
th j-pins
R
th j-amb
Parameter
Thermal Resistance Junction-Pins
Thermal Resistance Junction-ambient
max,
max,
PowerDIP
12
60
SO20
16
80
Unit
°C/W
°C/W
3
Circuit Operation
The L4972A is a 2A monolithic stepdown switching regulator working in continuous mode realized in the
new BCD Technology. This technology allows the integration of isolated vertical DMOS power transistors
plus mixed CMOS/Bipolar transistors.
The device can deliver 2A at an output voltage adjustable from 5.1V to 40V and contains diagnostic and
control functions that make it particularly suitable for microprocessor based systems.
3.1 BLOCK DIAGRAM
The block diagram shows the DMOS power transistors and the PWM control loop. Integrated functions
include a reference voltage trimmed to 5.1V ± 2%, soft start, undervoltage lockout, oscillator with feedfor-
ward control, pulse by pulse current limit, thermal shutdown and finally the reset and power fail circuit. The
reset and power fail circuit provides an output signal for a microprocessor indicating the status of the sys-
tem.
Device turn on is around 11V with a typical 1V hysterysis, this threshold porvides a correct voltage for the
driving stage of the DMOS gate and the hysterysis prevents instabilities.
An external bootstrap capacitor charge to 12V by an internal voltage reference is needed to provide cor-
rect gate drive to the power DMOS. The driving circuit is able to source and sink peak currents of around
0.5A to the gate of the DMOS transistor. A typical switching time of the current in the DMOS transistor is
50ns. Due to the fast commutation switching frequencies up to 200kHz are possible.
The PWM control loop consists of a sawtooth oscillator, error amplifier, comparator, latch and the output
3/22
L4972A
stage. An error signal is produced by comparing the output voltage with the precise 5.1V ± 2% on chip
reference. This error signal is then compared with the sawtooth oscillator in order to generate frixed fre-
quency pulse width modulated drive for the output stage. A PWM latch is included to eliminate multiple
pulsing within a period even in noisy environments.
The gain and stability of the loop can be adjusted by an external RC network connected to the output of
the error amplifier. A voltage feedforward control has been added to the oscillator, this maintains superior
line regulation over a wide input voltage range. Closing the loop directly gives an output vol-tage of 5.1V,
higher voltages are obtained by inserting a voltage divider.
At turn on, output overcurrents are prevented by the soft start function (fig. 5). The error amplifier is initially
clamped by an external capacitor, Css, and allowed to rise linearly under the charge of an internal constant
current source.
Output overload protection is provided by a current limit circuit. The load current is sensed by a internal
metal resistor connected to a comparator. When the load current exceeds a preset threshold, the output
of the comparator sets a flip flop which turns off the power DMOS. The next clock pulse, from an internal
40kHz oscillator, will reset the flip flop and the power DMOS will again conduct. This current protection
method, ensures a constant current output when the system is overloaded or short circuited and limits the
switching frequency, in this condition, to 40kHz. The Reset and Power fail diagram (fig. 7), generates an
output signal when the supply voltage exceeds a threshold programmed by an external voltage divider.
The reset signal, is generated with a delay time programmed by a external capacitor on the delay pin.
When the supply voltage falls below the threshold or the output voltage goes below 5V, the reset output
goes low immediately. The reset output is an open drain.
Fig. 7A shows the case when the supply voltage is higher than the threshold, but the output voltage is not
yet 5V.
Fig. 7B shows the case when the output is 5.1V, but the supply voltage is not yet higher than the fixed
threshold. The thermal protection disables circuit operation when the junction temperature reaches about
150°C and has a hysterysis to prevent unstable conditions.
Figure 4. Feedforward Waveform.
Figure 5. Soft Start Function.
4/22
L4972A
Figure 6. Limiting Current Function.
Figure 7. Reset and Power Fail Functions
A
B
5/22
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