FQPF12N60
April 2000
QFET
FQPF12N60
600V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
TM
Features
•
•
•
•
•
•
5.8A, 600V, R
DS(on)
= 0.7
Ω
@ V
GS
= 10 V
Low gate charge ( typical 42 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
"
G
!
GD S
! "
"
"
TO-220F
FQPF Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
T
C
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
FQPF12N60
600
5.8
3.7
23
±30
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
Vns
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
C
= 25°C)
790
5.8
5.5
4.5
55
0.44
-55 to +150
300
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
Thermal Characteristics
Symbol
R
θJC
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
Typ
--
--
Max
2.27
62.5
Units
°CW
°CW
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQPF12N60
Electrical Characteristics
T
Symbol
Parameter
C
= 25°C unless otherwise noted
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
∆BV
DSS
/
∆T
J
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
GS
= 0 V, I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, T
C
= 125°C
V
GS
= 30 V, V
DS
= 0 V
V
GS
= -30 V, V
DS
= 0 V
600
--
--
--
--
--
--
0.71
--
--
--
--
--
--
10
100
100
-100
V
V/°C
µA
µA
nA
nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
DS
= V
GS
, I
D
= 250
µA
V
GS
= 10 V, I
D
= 2.9 A
V
DS
= 50 V, I
D
= 2.9 A
(Note 4)
3.0
--
--
--
0.55
6.0
5.0
0.7
--
V
Ω
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
--
--
1480
200
25
1900
270
35
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 480 V, I
D
= 12 A,
V
GS
= 10 V
(Note 4, 5)
(Note 4, 5)
V
DD
= 300 V, I
D
= 12 A,
R
G
= 25
Ω
--
--
--
--
--
--
--
30
115
95
85
42
8.6
21
70
240
200
180
54
--
--
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
V
GS
= 0 V, I
S
= 5.8 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0 V, I
S
= 12 A,
dI
F
/ dt = 100 A/µs
(Note 4)
--
--
--
--
--
--
--
--
380
3.5
5.8
23
1.4
--
--
A
A
V
ns
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 43mH, I
AS
= 5.8A, V
DD
= 50V, R
G
= 25
Ω,
Starting T
J
= 25°C
3. I
SD
12A, di/dt
200A/µs, V
DD
BV
DSS,
Starting T
J
= 25°C
4. Pulse Test : Pulse width
300µs, Duty cycle
2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQPF12N60
Typical Characteristics
10
1
I
D
, Drain Current [A]
I
D
, Drain Current [A]
V
GS
15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Top :
10
1
150
25
10
0
-55
10
0
Notes :
1. 250 Pulse Test
s
2. T
C
= 25
Notes :
1. V
DS
= 50V
2. 250 Pulse Test
s
10
-1
10
0
10
1
10
-1
2
4
6
8
10
V
DS
, Drain-Source Voltage [V]
V
GS
, Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
5
10
15
20
25
30
35
V
GS
= 10V
V
GS
= 20V
1
10
I
DR
, Reverse Drain Current [A]
R
DS(on)
[
Ω
],
Drain-Source On-Resistance
10
0
150
25
Notes :
1. V
GS
= 0V
2. 250 Pulse Test
s
10
-1
I
D
, Drain Current [A]
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
V
SD
, Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
3000
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
12
V
DS
= 120V
10
2400
V
DS
= 300V
V
DS
= 480V
V
GS
, Gate-Source Voltage [V]
C
iss
8
Capacitance [pF]
1800
C
oss
6
1200
C
rss
600
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
4
2
Note : I
D
= 12 A
0
-1
10
0
10
0
10
1
0
5
10
15
20
25
30
35
40
45
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQPF12N60
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV
DSS
, (Norm
alized)
Drain-Source Breakdown Voltage
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
Notes :
1. V
GS
= 10 V
2. I
D
= 6.0 A
0.9
Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
0.5
0.8
-100
-50
0
50
100
o
150
200
0.0
-100
-50
0
50
100
o
150
200
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
6
10
2
Operation in This Area
is Limited by R
DS(on)
5
I
D
, Drain Current [A]
10
1
100
µ
s
I
D
, Drain Current [A]
3
1 ms
10 ms
100 ms
DC
4
10
0
3
2
10
-1
Notes :
1. T
C
= 25 C
2. T
J
= 150 C
3. Single Pulse
o
o
1
10
-2
10
0
10
1
10
2
10
0
25
50
75
100
125
150
V
DS
, Drain-Source Voltage [V]
T
C
, Case Temperature [
]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
( t) , T h e r m a l R e s p o n s e
10
0
D = 0 .5
0 .2
0 .1
N o te s :
1 . Z
J C
( t ) = 2 . 2 7
/W M a x .
2 . D u ty F a c t o r , D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
J C
( t )
10
-1
0 .0 5
0 .0 2
0 .0 1
P
DM
t
1
t
2
Z
JC
10
-2
s in g le p u ls e
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t
1
, S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQPF12N60
Gate Charge Test Circuit & Waveform
50K
12V
200nF
300nF
Same Type
as DUT
V
DS
V
GS
Q
g
10V
Q
gs
Q
gd
V
GS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
V
DS
V
GS
R
G
R
L
V
DD
V
DS
90%
10V
DUT
V
GS
10%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Unclamped Inductive Switching Test Circuit & Waveforms
L
V
DS
I
D
R
G
V
DD
DUT
t
p
BV
DSS
1
---- L I
AS2
--------------------
E
AS
=
2
BV
DSS
- V
DD
BV
DSS
I
AS
I
D
(t)
V
DD
t
p
10V
V
DS
(t)
Time
©2000 Fairchild Semiconductor International
Rev. A, April 2000
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