Low Power, High Output Current, Quad Op Amp,
Dual-Channel ADSL/ADSL2+ Line Driver
AD8392
FEATURES
Four current feedback, high current amplifiers
Ideal for use as ADSL/ADSL2+ dual-channel Central Office
(CO) line drivers
Low power operation
Power supply operation from ±5 V (+10 V) up to ±12 V (+24 V)
Less than 3 mA/Amp quiescent supply current for full
power ADSL/ADSL2+ CO applications (20.4 dBm line
power, 5.5 CF)
Three active power modes plus shutdown
High output voltage and current drive
400 mA peak output drive current
44 V p-p differential output voltage
Low distortion
−72 dBc @1 MHz second harmonic
−82 dBc @ 1 MHz third harmonic
High speed: 900 V/µs differential slew rate
Additional functionality of AD8392ACP
On-chip common-mode voltage generation
PIN CONFIGURATIONS
V
EE
1, 2
1
PD0 1, 2
PD1 1, 2
+V
IN
1
–V
IN
1
V
OUT
1
V
CC
1, 2
NC
V
OUT
3
2
3
4
5
6
7
8
9
28
GND
27
NC
26
NC
1
2
25
+V
IN
2
24
–V
IN
2
23
V
OUT
2
AD8392
22
NC
21
V
CC
3, 4
20
V
OUT
4
–V
IN
3
10
+V
IN
3
11
NC
12
NC
13
GND
14
3
4
19
–V
IN
4
18
+V
IN
4
PD0 3, 4
V
EE
3, 4
04802-0-001
17
PD1 3, 4
16
15
NC = NO CONNECT
Figure 1. AD8392ARE, 28-Lead TSSOP/EP
V
COM
1, 2
PD1 1, 2
PD0 1, 2
V
EE
1, 2
+V
IN
1
+V
IN
2
24
GND
32 31 30 29 28 27 26 25
NC
APPLICATIONS
ADSL/ADSL2+ CO line drivers
XDSL line drives
High output current, low distortion amplifiers
DAC output buffer
NC
1
–V
IN
1
V
OUT
1
V
CC
1, 2
NC
V
OUT
3
–V
IN
3
NC
2
3
4
5
6
7
8
9
1
2
NC
–V
IN
2
V
OUT
2
NC
V
CC
3, 4
V
OUT
4
–V
IN
4
NC
23
22
21
AD8392
20
19
3
4
18
17
PD0 3, 4
V
COM
3, 4
PD1 3, 4
V
EE
3, 4
+V
IN
3
+V
IN
4
GND
NC
GENERAL DESCRIPTION
The AD8392 is comprised of four high output current, low
power consumption, operational amplifiers. It is particularly
well suited for the CO driver interface in digital subscriber line
systems, such as ADSL and ADSL2+. The driver is capable of
providing enough power to deliver 20.4 dBm to a line, while
compensating for losses due to hybrid insertion and back
termination resistors. In addition, the low distortion, fast slew
rate, and high output current capability make the AD8392 ideal
for many other applications, including medical, instrumenta-
tion, DAC output drivers, and other high peak current circuits.
The AD8392 is available in two thermally enhanced packages, a
28-lead TSSOP EP (AD8392ARE) and a 5 mm × 5 mm 32-lead
LFCSP (AD8392ACP). Four bias modes are available via the use
of two digital bits (PD1, PD0).
10 11 12 13 14 15 16
04802-0-002
Figure 2. AD8392ACP, 32-Lead LFCSP 5 mm × 5 mm
Additionally, the AD8392ACP provides V
COM
pins for on-chip
common mode voltage generation.
The low power consumption, high output current, high output
voltage swing, and robust thermal packaging enable the AD8392
to be used as the CO line drivers in ADSL and other xDSL sys-
tems, as well as other high current, single-ended or differential
amplifier applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD8392
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 11
Applications..................................................................................... 12
Supplies, Grounding, and Layout ............................................. 12
Resistor Selection........................................................................ 12
Power Management ................................................................... 12
Driving Capacitive Loads.......................................................... 12
Thermal Considerations............................................................ 13
Typical ADSL/ADSL2+ Application ........................................ 13
Multitone Power Ratio............................................................... 14
Lightning and AC Power Fault ................................................. 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
7/04—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
AD8392
SPECIFICATIONS
V
S
= ±12 V or +24 V, R
L
= 100 Ω, G = +5, PD = (0, 0), T = 25°C, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
−3 dB Large Signal Bandwidth
Peaking
Slew Rate
NOISE/DISTORTION PERFORMANCE
Second Harmonic Distortion
Third Harmonic Distortion
Multitone Input Power Ratio
Voltage Noise (RTI)
+Input Current Noise
−Input Current Noise
INPUT CHARACTERISTICS
RTI Offset Voltage
+Input Bias Current
−Input Bias Current
Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Differential Output Voltage Swing
Single-Ended Output Voltage Swing
Linear Output Current
POWER SUPPLY
Operating Range (Dual Supply)
Operating Range (Single Supply)
Total Quiescent Current
PD1, PD0 = (0, 0)
PD1, PD0 = (0, 1)
PD1, PD0 = (1, 0)
PD1, PD0 = (1, 1) (Shutdown State)
PD = 0 Threshold
PD = 1 Threshold
+Power Supply Rejection Ratio
−Power Supply Rejection Ratio
Min
30
20
850
Typ
40
25
0.05
900
−72
−82
−70
4.3
10
13
−5.0
±3.0
5.0
10.0
400
2.0
68
44.0
22.0
400
+5.0
10.0
15.0
Max
Unit
MHz
MHz
dB
V/µs
dBc
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
mV
µA
µA
kΩ
pF
dB
V
V
mA
V
V
mA/Amp
mA/Amp
mA/Amp
mA/Amp
V
V
dB
dB
Test Conditions/Comments
V
OUT
= 0.1 V p-p, R
F
= 2 kΩ
V
OUT
= 4 V p-p, R
F
= 2 kΩ
V
OUT
= 0.1 V p-p, R
F
= 2 kΩ
V
OUT
= 20 V p-p, R
F
= 2 kΩ
f
C
= 1 MHz, V
OUT
= 2 V p-p
f
C
= 1 MHz, V
OUT
= 2 V p-p
26 kHz to 2.2 MHz, Z
LINE
= 100 Ω Differential Load
f = 10 kHz
f = 10 kHz
f = 10 kHz
V
+IN
− V
−IN
64
42.0
21.0
(∆V
OS, DM (RTI)
)/(∆V
IN, CM
)
∆V
OUT
∆V
OUT
R
L
= 10 Ω, f
C
= 100 kHz
46.0
23.0
±5
10
6.0
3.6
2.8
0.4
1.8
64
76
±12
24
7.0
4.0
3.3
1.2
0.8
68
79
∆V
OS, DM (RTI)
/∆V
CC
, ∆V
CC
= ±1 V
∆V
OS, DM (RTI)
/∆V
EE
, ∆V
EE
= ±1 V
Rev. 0 | Page 3 of 16
AD8392
V
S
= ±5 V or +10 V, R
L
= 100 Ω, G = +5, PD = (0, 0), T = 25°C, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
−3 dB Large signal Bandwidth
Peaking
Slew Rate (Rise)
Slew Rate (Fall)
NOISE/DISTORTION PERFORMANCE
Second Harmonic Distortion
Third Harmonic Distortion
Voltage Noise (RTI)
+Input Current Noise
−Input Current Noise
INPUT CHARACTERISTICS
RTI Offset Voltage
+Input Bias Current
−Input Bias Current
Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Differential Output Voltage Swing
Single-Ended Output Voltage Swing
Linear Output Current
POWER SUPPLY
Operating Range (Dual Supply)
Operating Range (Single Supply)
Total Quiescent Current
PD1, PD0 = (0, 0)
PD1, PD0 = (0, 1)
PD1, PD0 = (1, 0)
PD1, PD0 = (1, 1) (Shutdown State)
PD = 0 Threshold
PD = 1 Threshold
+Power Supply Rejection Ratio
−Power Supply Rejection Ratio
Min
30
20
300
400
Typ
40
25
0.05
350
450
−72
−82
4.3
10
13
−5.0
±3.0
5.0
10.0
400
2.0
66
16.0
8.0
400
+5.0
10.0
15.0
Max
Unit
MHz
MHz
dB
V/µs
V/µs
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
mV
µA
µA
kΩ
pF
dB
V
V
mA
V
V
mA/Amp
mA/Amp
mA/Amp
mA/Amp
V
V
dB
dB
Test Conditions/Comments
V
OUT
= 0.1 V p-p, R
F
= 2 kΩ
V
OUT
= 4 V p-p, R
F
= 2 kΩ
V
OUT
= 0.1 V p-p, R
F
= 2 kΩ
V
OUT
= 7 V p-p, R
F
= 2 kΩ
V
OUT
= 7 V p-p, R
F
= 2 kΩ
f
C
= 1 MHz, V
OUT
= 2 V p-p
f
C
= 1 MHz, V
OUT
= 2 V p-p
f = 10 kHz
f = 10 kHz
f = 10 kHz
V
+IN
− V
−IN
62
14.0
7.0
(∆V
OS, DM (RTI)
)/(∆V
IN, CM
)
∆V
OUT
∆V
OUT
R
L
= 10 Ω, f
C
= 100 kHz
18.0
9.0
±5
+10
5.4
3.5
2.6
0.4
1.8
72
64
±12
+24
6.0
4.0
3.0
1.0
0.8
76
68
∆V
OS, DM (RTI)
/∆V
CC
, ∆V
CC
= ±1 V
∆V
OS, DM (RTI)
/∆V
EE
, ∆V
EE
= ±1 V
Rev. 0 | Page 4 of 16
AD8392
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Storage Temperature
Operating Temperature Range
Lead Temperature Range (Soldering 10 sec)
Junction Temperature
Rating
±13 V (+26 V)
See Figure 3
−65°C to +150°C
−40°C to +85°C
300°C
150°C
RMS output voltages should be considered. If R
L
is referenced
to V
S−
as in single-supply operation, the total power is V
S
× I
OUT
.
In single supply with R
L
to V
S−
, worst case is V
OUT
= V
S
/2.
Airflow increases heat dissipation, effectively reducing θ
JA
. Also,
more metal directly in contact with the package leads from
metal traces, through holes, ground, and power planes reduces
the θ
JA
.
Figure 3 shows the maximum safe power dissipation in the
package versus the ambient temperature for the LFCSP-32 and
TSSOP-28/EP packages on a JEDEC standard 4-layer board. θ
JA
values are approximations.
7
T
J
= 150°C
6
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, i.e., θ
JA
is specified
for device soldered in circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
LFCSP-32 (CP)
TSSOP-28/EP (RE)
θ
JA
27.27
35.33
Unit
°C/W
°C/W
MAXIMUM POWER DISSIPATION (W)
5
LFCSP-32
4
TSSOP-28/EP
3
2
1
0
–40 –30 –20 –10
04802-0-003
Maximum Power Dissipation
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
S
) times the
quiescent current (I
S
). Assuming that the load (R
L
) is midsupply,
the total drive power is V
S
/2 × I
OUT
, some of which is
dissipated in the package and some in the load (V
OUT
× I
OUT
).
0
10 20 30 40 50
TEMPERATURE (°C)
60
70
80
90
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
See the Thermal Considerations section for additional thermal
design guidance.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features proprie-
tary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
Rev. 0 | Page 5 of 16
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