ACTS373MS
April 1995
Radiation Hardened
Octal Transparent Latch, Three-State
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C
TOP VIEW
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
Features
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose 300K RAD (Si)
• Single Event Upset (SEU) Immunity
<1 x 10
-10
Errors/Bit-Day (Typ)
• SEU LET Threshold >80 MEV-cm
• Dose Rate Upset >10
11
2
/mg
RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2V Min
• Input Current
≤1µA
at VOL, VOH
GND 10
20 LEAD CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR, CDFP4-F20, LEAD FINISH C
TOP VIEW
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
Description
The Intersil ACTS373MS is a radiation hardened octal transpar-
ent latch with three-state outputs. The outputs are transparent to
the inputs when the latch enable (LE) is high. When the LE goes
low, the data is latched. When the Output Enable (OE) is high,
the outputs are in the high impedance state. The latch operation
is independent of the state of the output enable.
The ACTS373MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of the
radiation hardened, high-speed, CMOS/SOS Logic Family.
Ordering Information
PART NUMBER
ACTS373DMSR
ACTS373KMSR
ACTS373D/Sample
ACTS373K/Sample
ACTS373HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55 C to +125 C
+25
o
C
+25
o
C
+25
o
C
o
o
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
Truth Table
OE
L
L
L
L
H
NOTE:
L = Low Voltage Level
H = High Voltage Level
LE
H
H
L
L
X
D
H
L
I
h
X
X = Don’t Care
Z = High Impedance State
Q
H
L
L
H
Z
Functional Diagram
1 OF 8
(3, 4, 7, 8, 13,
14, 17, 18)
D
COMMON
CONTROLS
LE
(11)
OE
(1)
LATCH
OE
D
Q
LE
Q
(2, 5, 6, 9, 12,
15, 16, 19)
I = Low voltage level one set-up time prior to the high to low latch enable transition
h = High voltage level one set-up time prior to the high to low latch enable transition
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
1
518800
File Number
4000
Specifications ACTS373MS
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . .±50mA
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
(All Voltages Reference to VSS)
Reliability Information
Thermal Impedance
θ
JA
θ
JC
o
DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
72 C/W
24
o
C/W
o
C/W
28
o
C/W
Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Maximum Package Power Dissipation at +125
o
C
DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7W
Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5W
Maximum Device Power Dissipation. . . . . . . . . . . . . . . . . . .(TBD)W
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Gates
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . 10ns/V Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . VCC to VCC/2V
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
1
2, 3
1
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1
2, 3
1
2, 3
7, 8A, 8B
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
-12
-8
12
8
VCC -
0.1
VCC -
0.1
-
-
-
-
-
-
-
MAX
20
400
-
-
-
-
-
-
0.1
0.1
±0.5
±1.0
±1
±35
-
UNITS
µA
µA
mA
mA
mA
mA
V
V
V
V
µA
µA
µA
µA
V
PARAMETER
Supply Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
VCC = VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V, (Note 2)
VCC = VIH = 4.5V,
VOUT = 0.4V, VIL = 0V,
(Note 2)
VCC = 5.5V, VIH = 2.75V
VIL = 0.8V, IOH = -50µA
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, IOH = -50µA
Output Current
(Source)
Output Current
(Sink)
Output Voltage High
IOH
IOL
VOH
Output Voltage Low
VOL
VCC = 5.5V, VIH = 2.75V
VIL = 0.8V, IOH = 50µA
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, IOH = 50µA
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
NOTE:
IIN
VCC = 5.5V,
VIN = VCC or GND
VCC = 5.5V,
Force Voltage = 0V or VCC
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
IOZ
FN
1. All voltages referenced to device GND.
2. Force/measure functions may be interchanged.
3. For functional tests, VO
≥4.0V
is recognized as a logic “1”, and VO
≤0.5V
is recognized as a logic “0”.
Spec Number
2
518800
Specifications ACTS373MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
MAX
19
21
18
20
17
18
17
19
18
20
18
18
19
20
17
18
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
Propagation Delay
SYMBOL
TPHL1
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPLH1
TPHL2
TPLH2
TPZL1
TPLZ1
TPHZ1
TPZH1
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
NOTE
1
TEMP
+25
o
C
+125
o
C
1
+25
o
C
+125
o
C
1
+25
o
C
+125
o
C
1
+25
o
C
+125
o
C
1
+25
o
C
+125
o
C
1
+25
o
C
+125
o
C
MIN
-
-
-
-
-
-
7
7
5
5
3
3
TYP
17
21
-
-
-
-
-
-
-
-
-
-
MAX
-
-
10
10
20
20
-
-
-
-
-
-
UNITS
pF
pF
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
CIN
Output Capacitance
COUT
Pulse Width Time
TW
Setup Time
TSU
Hold Time
TH
NOTES:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number
3
518800
Specifications ACTS373MS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
RAD LIMITS
PARAMETER
Supply Current
Output Current (Source)
SYMBOL
ICC
IOH
(NOTE 1)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = VIH = 4.5V,
VOUT = VCC -0.4V, VIL = 0
VCC = VIH = 4.5V, VOUT = 0.4V,
VIL = 0
VCC = 5.5V, VIH = 2.75V,
VIL = 0.8V, IOH = -50µA
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, IOH = -50µA
Output Voltage Low
VOL
VCC = 5.5V, VIH = 2.75V,
VIL = 0.8V, IOH = 50µA
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, IOH = 50µA
Input Leakage Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
Propagation Delay
IIN
IOZ
VCC = 5.5V, VIN = VCC or GND
VCC = 5.5V,
Force Voltage = 0V or VCC
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 2)
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
TEMP
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
-8
MAX
400
-
UNITS
µA
mA
Output Current (Sink)
IOL
8
-
mA
Output Voltage High
VOH
VCC -0.1
-
V
VCC -0.1
-
V
-
0.1
V
-
0.1
±1
±35
V
µA
µA
-
-
FN
-
-
V
TPHL1
TPLH1
TPHL2
TPLH2
TPZL1
TPLZ1
TPHZ1
TPZH1
2
2
2
2
2
2
2
2
21
20
18
19
20
18
20
18
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO
≥4.0V
is recognized as a logic “1”, and VO
≤0.5V
is recognized as a logic “0”.
TABLE 5. DELTA PARAMETERS (+25
o
C)
(NOTE 1)
DELTA LIMIT
±4.0
±200
±15
PARAMETER
Supply Current
Three-State Leakage Current
Output Current
NOTE:
ICC
IOZ
IOL/IOH
SYMBOL
UNITS
µA
nA
%
1. All delta calculations are referenced to 0 hour readings or pre-life readings.
Spec Number
4
518800
Specifications ACTS373MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
Initial Test (Preburn-In)
Interim Test 1 (Postburn-In)
Interim Test 2 (Postburn-In)
PDA
Interim Test 3 (Postburn-In)
PDA
Final Test
Group A (Note 1)
Group B
Subgroup B-5
Subgroup B-6
Group D
NOTE:
1. Alternate Group A testing may be exercised in accordance with MIL-STD-883, Method 5005.
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
Sample/5005
Sample/5005
GROUP A SUBGROUPS
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9, Deltas
1, 7, 9
1, 7, 9, Deltas
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
1, 7, 9
Subgroups 1, 2, 3, 9, 10, 11
ICC, IOL/H, IOZL/H
READ AND RECORD
ICC, IOL/H, IOZL/H
ICC, IOL/H, IOZL/H
ICC, IOL/H, IOZL/H
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
Group E Subgroup 2
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. BURN-IN TEST CONNECTIONS (+125
o
C < TA < 139
o
C)
OSCILLATOR
OPEN
STATIC BURN-IN 1 (Note 1)
-
STATIC BURN-IN 2 (Note 1)
-
DYNAMIC BURN-IN (Note 1)
-
NOTE:
1. Each pin except VCC and GND will have a series resistor of 500Ω
±5%.
TABLE 9. IRRADIATION TEST CONNECTIONS (TA = +25
o
C,
±5
o
C)
FUNCTION
Irradiation Circuit (Note 1)
NOTE:
1. Each pin except VCC and GND will have a series resistor of 47kΩ
±5%.
Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures.
OPEN
2, 5, 6, 9, 12, 15, 16, 19
GROUND
10
VCC = 5V
±0.5V
1, 3, 4, 7, 8, 11, 13, 14, 17, 18, 20
1, 10
2, 5, 6, 9, 12, 15, 16, 19
20
11
3, 4, 7, 8, 13,
14, 17, 18
10
2, 5, 6, 9, 12, 15, 16, 19
1, 3, 4, 7, 8, 11, 13,
14, 17, 18, 20
-
-
1, 3, 4, 7, 8, 10, 11,
13, 14, 17, 18
2, 5, 6, 9, 12, 15, 16, 19
20
-
-
GROUND
1/2 VCC = 3V
±0.5V
VCC = 6V
±0.5V
50kHz
25kHz
METHOD
5005
PRE RAD
1, 7, 9
POST RAD
Table 4
READ AND RECORD
PRE RAD
1, 9
POST RAD
Table 4 (Note 1)
Spec Number
5
518800
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