2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
Features
x
x
Advance
Information
IDT71T016SA
Description
The IDT71T016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71T016 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71T016 are LVTTL-compatible and operation is from a
single 2.5V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
x
x
x
x
x
x
64K x 16 advanced high-speed CMOS Static RAM
Equal access and cycle times
— Commercial: 10/12/15/20ns
— Industrial: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 2.5V power supply
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball
Plastic FBGA packages
Functional Block Diagram
OE
Output
Enable
Buffer
A
0
– A
15
Address
Buffers
Row / Column
Decoders
I/O
15
Chip
Enable
Buffer
Sense
Amps
and
Write
Drivers
8
Low
Byte
I/O
Buffer
8
8
High
Byte
I/O
Buffer
8
CS
I/O
8
WE
Write
Enable
Buffer
64K x 16
Memory
Array
16
I/O
7
I/O
0
BHE
Byte
Enable
Buffers
BLE
5326 drw 01
AUGUST 2001
1
©2001 Integrated Device Technology, Inc.
DSC-5326/00
IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Pin Configurations
A
A
4
A
3
A
2
A
1
A
0
CS
I/O
0
I/O
1
I/O
2
I/O
3
V
DD
V
SS
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
15
A
14
A
13
A
12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SO44-1
SO44-2
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
5
A
6
A
7
OE
BHE
BLE
I/O
15
I/O
14
I/O
13
I/O
12
V
SS
V
DD
I/O
11
I/O
10
I/O
9
I/O
8
NC
A
8
A
9
A
10
A
11
NC
1
BLE
I/O
8
I/O
9
V
SS
V
DD
I/O
14
I/O
15
NC
2
OE
BHE
I/O
10
I/O
11
I/O
12
I/O
13
NC
A
8
3
A
0
A
3
A
5
NC
NC
A
14
A
12
A
9
4
A
1
A
4
A
6
A
7
NC
A
15
A
13
A
10
5
A
2
CS
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
NC
I/O
0
I/O
2
V
DD
V
SS
I/O
6
I/O
7
NC
5326 tbl 02a
B
C
D
E
F
G
H
FBGA (BF48-1)
Top View
Pin Description
A
0
– A
15
Address Inputs
Chip Select
Write Enable
Output Enable
High Byte Enable
Low Byte Enable
Data Input/Output
2.5V Power
Ground
Input
Input
Input
Input
Input
Input
I/O
Power
Gnd
5326 tbl 01
TSOP
Top View
5326 drw 02
CS
WE
OE
BHE
BLE
I/O
0
– I/O
15
V
DD
V
SS
Truth Table
(1)
CS
H
L
L
L
L
L
L
L
L
OE
X
L
L
L
X
X
X
H
X
WE
X
H
H
H
L
L
L
H
X
BLE
X
L
H
L
L
L
H
X
H
BHE
X
H
L
L
L
H
L
X
H
I/O
0
-I/O
7
High-Z
DATA
OUT
High-Z
DATA
OUT
DATA
IN
DATA
IN
High-Z
High-Z
High-Z
I/O
8
-I/O
15
High-Z
High-Z
DATA
OUT
DATA
OUT
DATA
IN
High-Z
DATA
IN
High-Z
High-Z
Function
Deselected – Standby
Low Byte Read
High Byte Read
Word Read
Word Write
Low Byte Write
High Byte Write
Outputs Disabled
Outputs Disabled
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't care.
5326 tbl 02
6.42
2
IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Absolute Maximum Ratings
(1)
Symbol
V
DD
V
IN
, V
OUT
T
BIAS
T
STG
P
T
I
OUT
Rating
Supply Voltage Relative
to V
SS
Terminal Voltage Relative
to V
SS
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
–0.3 to +3.6
–0.3 to V
DD
+0.3
–55 to +125
–55 to +125
1.25
50
Unit
V
V
o
Recommended Operating
Temperature and Supply Voltage
Grade
Commercial
Industrial
Temperature
0°C to +70°C
-40°C to +85°C
V
SS
0V
0V
V
DD
See Below
See Below
5326 tbl 04
C
C
o
W
mA
5326 tbl 03
Recommended DC Operating
Conditions
Sym bol
V
DD
V ss
V
IH
V
IL
Param eter
S up p ly Vo ltag e
Gro und
Inp ut Hig h Vo ltag e
Inp ut Lo w Vo ltag e
Min.
2.375
0
1.7
–0.3
Typ.
2.5
0
____
____
Max.
2.625
0
V
DD
+0.3
0.7
Unit
V
V
V
V
5326 tbl 05
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Capacitance
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 3dV
V
OUT
= 3dV
Max.
6
7
Unit
pF
pF
5326 tbl 06
NOTE:
1. This parameter is guaranteed by device characterization, but not production tested.
DC Electrical Characteristics
(V
DD
= Min. to Max., Commercial and Industrial Temperature Ranges)
IDT71T016SA
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Condition
V
DD
= Max., V
IN
= V
SS
to V
DD
V
DD
= Max.,
CS
= V
IH
, V
OUT
= V
SS
to V
DD
I
OL
= 2.0mA, V
DD
= Min.
I
OH
= 2.0mA, V
DD
= Min.
Min.
___
___
___
Max.
5
5
0.7
___
Unit
µA
µA
V
V
5326 tbl 07
1.7
DC Electrical Characteristics
(1,2)
(V
DD
= Min. to Max., V
LC
= 0.2V, V
HC
= V
DD
– 0.2V)
71T016SA10
Parameter
Symbol
I
CC
Dynamic Operating Current
CS
< V
LC
, Outputs Open, V
DD
= Max., f = f
MAX
(3)
Dynamic Standby Power Supply Current
CS
> V
HC
, Outputs Open, V
DD
= Max., f = f
MAX
(3)
Full Standby Power Supply Current (static)
CS
> V
HC
, Outputs Open, V
DD
= Max., f = 0
(3)
Max.
Typ.
(4)
Com'l
160
125
45
10
Com'l
150
120
40
15
Ind
160
____
71T016SA12
71T016SA15
Com'l
130
110
35
15
Ind
130
____
71T016SA20
Com'l
120
110
30
15
Ind
120
mA
____
Unit
I
SB
I
SB1
45
15
35
15
30
15
mA
mA
5326 tbl 8
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and V
DD
– 0.2V (High).
3. f
MAX
= 1/t
RC
(all address inputs are cycling at f
MAX
); f = 0 means no address input lines are changing .
4. Typical values are measured at 2.5V, 25°C and with equal read and write cycles.
6.42
3
IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
0V to 2.5V
1.5ns
(V
DD
/2)
(V
DD
/2)
See Figure 1, 2 and 3
5326 tbl 09
AC Test Loads
+1.25V
50Ω
I/O
Z
0
= 50Ω
DATA
OUT
5pF*
2.5V
320Ω
350Ω
5326 drw 04
30pF
5326 drw 03
*Including jig and scope capacitance.
Figure 1. AC Test Load
Figure 2. AC Test Load
(for t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
OW,
and t
WHZ
)
7
∆t
AA,
t
ACS
(Typical, ns) 5
4
3
•
•
•
6
2
1
·
•
•
•
8 20 40 60 80 100 120 140 160 180 200
CAPACITANCE (pF)
Figure 3. Output Capacitive Derating
5326 drw 05
6.42
4
IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
Symbol
READ CYCLE
t
RC
t
AA
t
ACS
t
CLZ
(1)
t
CHZ
(1)
t
OE
t
OLZ
(1)
t
OHZ
(1)
t
OH
t
BE
t
BLZ
(1)
t
BHZ
(1)
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select Low to Output in Low-Z
Chip Select Hig h to Output in High-Z
Output Enable Low to Output Valid
Output Enable Lo w to Output in Low-Z
Output Enable High to Output in High-Z
Output Hold from Address Change
Byte Enable Low to Output Valid
Byte Enable Low to Output in Low-Z
Byte Enable High to Output in High-Z
10
____
____
(V
DD
= Min. to Max., Commercial and Industrial Temperature Ranges)
71T016SA12
Min.
Max.
71T016SA15
Min.
Max.
71T016SA20
Min.
Max.
Unit
Max.
71T016SA10
(2)
Parameter
Min.
____
12
____
____
____
15
____
____
____
20
____
____
____
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
____
12
12
____
15
15
____
20
20
____
4
____
4
____
5
____
5
____
5
5
____
6
6
____
6
7
____
8
8
____
____
____
____
____
0
____
0
____
0
____
0
____
5
—
5
____
6
—
6
____
6
—
7
____
8
—
8
____
4
—
0
____
4
—
0
____
4
—
0
____
4
____
0
____
5
6
6
8
WRITE CYCLE
t
WC
t
AW
t
CW
t
BW
t
AS
t
WR
t
WP
t
DW
t
DH
t
OW
(1)
t
WHZ
(1)
Write Cycle Time
Address Valid to End of Write
Chip Select Low to End of Write
Byte Enable Low to End of Write
Address Set-up Time
Address Hold from End of Write
Write Pulse Width
Data Valid to End of Write
Data Hold Time
Write Enable High to Output in Low-Z
Write Enable Lo w to Output in High-Z
10
7
7
7
0
0
7
5
0
3
____
____
12
8
8
8
0
0
8
6
0
3
____
____
15
10
10
10
0
0
10
7
0
3
____
____
20
12
12
12
0
0
12
9
0
3
____
____
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5326 tbl 10
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
5
6
6
8
NOTES:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
2. 0
0
C to +70
0
C temperature range only.
Timing Waveform of Read Cycle No. 1
(1,2,3)
t
RC
ADDRESS
t
AA
t
OH
D ATA
OUT
PREVIOUS DATA
OUT
VALID
t
OH
DATA
OUT
VALID
5326 drw 06
NOTES:
1.
WE
is HIGH for Read Cycle.
2. Device is continuously selected,
CS
is LOW.
3.
OE, BHE,
and
BLE
are LOW.
6.42
5
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