54LS109FMQB datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> 54LS109FMQB

54LS109FMQB: DescriptionJ-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CDFP16, CERAMIC, FP-16; Categorylogic logic; File Size157KB，6 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

Download Datasheet Parametric Compare View All

54LS109FMQB Overview

J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CDFP16, CERAMIC, FP-16

54LS109FMQB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Fairchild
Parts packaging code	DFP
package instruction	CERAMIC, FP-16
Contacts	16
Reach Compliance Code	compliant
series	LS
JESD-30 code	R-GDFP-F16
JESD-609 code	e0
length	9.6645 mm
Logic integrated circuit type	J-KBAR FLIP-FLOP
Maximum Frequency@Nom-Sup	20000000 Hz
MaximumI(ol)	0.004 A
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Encapsulate equivalent code	FL16,.3
Package shape	RECTANGULAR
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	8 mA
propagation delay (tpd)	30 ns
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum seat height	2.032 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	6.604 mm
minfmax	25 MHz
Base Number Matches	1

Preview

Download Datasheet

View All

54LS109FMQB Related Products

	54LS109FMQB	54LS109DMQB	DM54LS109AW	DM54LS109AJ
Description	J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CDFP16, CERAMIC, FP-16	J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16	J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CDFP16, CERAMIC, FP-16	J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DFP	DIP	DFP	DIP
package instruction	CERAMIC, FP-16	DIP, DIP16,.3	DFP, FL16,.3	DIP, DIP16,.3
Contacts	16	16	16	16
Reach Compliance Code	compliant	compliant	compliant	compliant
series	LS	LS	LS	LS
JESD-30 code	R-GDFP-F16	R-GDIP-T16	R-GDFP-F16	R-GDIP-T16
JESD-609 code	e0	e0	e0	e0
length	9.6645 mm	19.304 mm	9.6645 mm	19.304 mm
Logic integrated circuit type	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP
Maximum Frequency@Nom-Sup	20000000 Hz	20000000 Hz	20000000 Hz	20000000 Hz
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.004 A
Number of digits	2	2	2	2
Number of functions	2	2	2	2
Number of terminals	16	16	16	16
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED
encapsulated code	DFP	DIP	DFP	DIP
Encapsulate equivalent code	FL16,.3	DIP16,.3	FL16,.3	DIP16,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK	IN-LINE	FLATPACK	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V
Maximum supply current (ICC)	8 mA	8 mA	8 mA	8 mA
propagation delay (tpd)	30 ns	30 ns	30 ns	30 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.032 mm	5.08 mm	2.032 mm	5.08 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	YES	NO	YES	NO
technology	TTL	TTL	TTL	TTL
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	FLAT	THROUGH-HOLE	FLAT	THROUGH-HOLE
Terminal pitch	1.27 mm	2.54 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	6.604 mm	7.62 mm	6.604 mm	7.62 mm
minfmax	25 MHz	25 MHz	25 MHz	25 MHz
Maker	Fairchild	-	Fairchild	Fairchild

Recommended Resources

The working principle of the microwave oven operation display circuit

Circuit design of electronic imitation mouse repeller

Gantry planer

Positive and negative 5V precision reference source circuit

Square root circuit composed of multiplication and division devices

CA3080 sample and hold circuit diagram

How to design the transformer before ADS62P48: [i=s] This post was last edited by dontium on 2015-1-23 13:26 [/i] I want to use ADS62P48 to collect a linear frequency modulation signal. How should I design the transformer before ADS62P48? ? ?...; phenix25 Analogue and Mixed Signal

Three-phase AC phase sequence detection circuit: When using a three-phase AC motor, it is necessary to know the phase sequence of the connected three-phase power supply. If the phase sequence is incorrect, the rotation direction of the motor will be...; fish001 Analogue and Mixed Signal

National Semiconductor's Sound and Color Analog Technology Application Design Competition: Competition website: [url]http://www.national.com/CHS/design_contest/[/url] Finalists: Before March 20, 2008, all finalists will receive a prize of RMB 500 and a set of National Semiconductor componen...; huchuan987 Talking

VXWORKS browser debugging question! Urgent!: Use the browser to debug the program! Check the task status. In the room time and space, the name of the user task often turns red. What's going on? Please give me some advice!...; ngfreeman Real-time operating system RTOS

【Weekly Discussion】Talk about the stupidest bug you encountered when writing C language programs: What is the stupidest bug you encountered when writing C language programs?...; wanghongyang Integrated technical exchanges

About writing device drivers with winddk and vc: How to solve the problem "the driver is marked as disabled" when testing the driver with DirverMonitor...; 65266613 Embedded System

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components