AT49BV320C datasheet, PDF - EEWORLD Datasheet

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AT49BV320C: Description32-megabit (2M x 16) 3-volt Only Flash Memory; File Size221KB，32 Pages; ManufacturerAtmel (Microchip)

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AT49BV320C Overview

32-megabit (2M x 16) 3-volt Only Flash Memory

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Features

•

Single Voltage Read/Write Operation: 2.65V to 3.6V

•

Access Time – 70 ns

•

Sector Erase Architecture

•

– Sixty-three 32K Word (64K Bytes) Sectors with Individual Write Lockout

– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout

Fast Word Program Time – 12 µs

Fast Sector Erase Time – 300 ms

Suspend/Resume Feature for Erase and Program

– Supports Reading and Programming from Any Sector by Suspending Erase

of a Different Sector

– Supports Reading Any Word by Suspending Programming of Any Other Word

Low-power Operation

– 12 mA Active

– 13 µA Standby

VPP Pin for Write Protection

WP Pin for Sector Protection

RESET Input for Device Initialization

Flexible Sector Protection

TSOP and CBGA Package Options

Top or Bottom Boot Block Configuration Available

128-bit Protection Register

Minimum 100,000 Erase Cycles

Common Flash Interface (CFI)

•

32-megabit

(2M x 16)

3-volt Only

Flash Memory

AT49BV320C

AT49BV320CT

Description

The AT49BV320C(T) is a 2.7-volt 32-megabit Flash memory organized as 2,097,152

words of 16 bits each. The memory is divided into 71 sectors for erase operations.

The device is offered in a 48-lead TSOP and a 47-ball CBGA package. The device has

CE and OE control signals to avoid any bus contention. This device can be read or

reprogrammed using a single power supply, making it ideally suited for in-system

programming.

Pin Configurations

Pin Name

A0 - A20

RESET

VPP

I/O0 - I/O15

VCCQ

Function

Addresses

Chip Enable

Output Enable

Write Enable

Reset

Write Protection

Data Inputs/Outputs

No Connect

Output Power Supply

Write Protect

Rev. 3372D–FLASH–5/04

Device

Operation

READ:

When the AT49BV320C(T) is in the read mode, with CE and OE low and WE high, the

data stored at the memory location determined by the address pins are asserted on the out-

puts. The outputs are put in the high impedance state whenever CE or OE is high. This dual-

line control gives designers flexibility in preventing bus contention.

COMMAND SEQUENCES:

When the device is first powered on, it will be in the read mode. In

order to perform other device functions, a series of command sequences are entered into the

device. The command sequences are shown in the “Command Definition” table on page 15

(I/O8 - I/O15 are don’t care inputs for the command codes). The command sequences are

written by applying a low pulse on the WE or CE input with CE or WE low (respectively) and

OE high. The address and data are latched by the first rising edge of CE or WE. Standard

microprocessor write timings are used. The address locations used in the command

sequences are not affected by entering the command sequences.

RESET:

A RESET input pin is provided to ease some system applications. When RESET is at

a logic high level, the device is in its standard operating mode. A low level on the RESET input

halts the present device operation and puts the outputs of the device in a high impedance

state. When a high level is reasserted on the RESET pin, the device returns to the read mode,

depending upon the state of the control inputs.

ERASURE:

Before a word can be reprogrammed, it must be erased. The erased state of

memory bits is a logical “1”. The individual sectors can be erased by using the Sector Erase

command.

SECTOR ERASE:

The device is organized into 71 sectors (SA0 - SA70) that can be individu-

ally erased. The Sector Erase command is a two-bus cycle operation. The sector address and

the D0H Data Input command are latched on the rising edge of WE. The sector erase starts

after the rising edge of WE of the second cycle provided the given sector has not been pro-

tected. The erase operation is internally controlled; it will automatically time to completion. The

maximum time to erase a sector is t

SEC

. An attempt to erase a sector that has been protected

will result in the operation terminating immediately.

WORD PROGRAMMING:

Once a memory sector is erased, it is programmed (to a logical “0”)

on a word-by-word basis. Programming is accomplished via the Internal Device command reg-

ister and is a two-bus cycle operation. The device will automatically generate the required

internal program pulses.

Any commands written to the chip during the embedded programming cycle will be ignored. If

a hardware reset happens during programming, the data at the location being programmed

will be corrupted. Please note that a data “0” cannot be programmed back to a “1”; only erase

operations can convert “0”s to “1”s. Programming is completed after the specified t

cycle

time. If the program status bit is a “1”, the device was not able to verify that the program oper-

ation was performed successfully. The status register indicates the programming status. While

the program sequence executes, status bit I/O7 is “0”. While programming, the only valid com-

mands are Read Status Register, Program Suspend and Program Resume.

VPP PIN:

The circuitry of the AT49BV320C(T) is designed so that the device cannot be pro-

grammed or erased if the V

voltage is less that 0.4V. When V

is at 1.5V or above, normal

program and erase operations can be performed. The VPP pin cannot be left floating.

READ STATUS REGISTER:

The status register indicates the status of device operations and

the success/failure of that operation. The Read Status Register command causes subsequent

reads to output data from the status register until another command is issued. To return to

reading from the memory, issue a Read command.

The status register bits are output on I/O7 - I/O0. The upper byte, I/O15 - I/O8, outputs 00H

when a Read Status Register command is issued.

AT49BV320C(T)

3372D–FLASH–5/04

AT49BV320C Related Products

	AT49BV320C	AT49BV320C-70CI	AT49BV320C-70TI	AT49BV320CT	AT49BV320CT-70CI	AT49BV320CT-70TI
Description	32-megabit (2M x 16) 3-volt Only Flash Memory	32-megabit (2M x 16) 3-volt Only Flash Memory	32-megabit (2M x 16) 3-volt Only Flash Memory	32-megabit (2M x 16) 3-volt Only Flash Memory	32-megabit (2M x 16) 3-volt Only Flash Memory	32-megabit (2M x 16) 3-volt Only Flash Memory
Is it Rohs certified?	-	incompatible	incompatible	-	incompatible	incompatible
Parts packaging code	-	BGA	TSOP1	-	BGA	TSOP1
package instruction	-	VFBGA, BGA47,6X8,30	TSOP1, TSSOP48,.8,20	-	7 X 10 MM, 1 MM HEIGHT, 0.75 MM PITCH, CBGA-47	12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48
Contacts	-	47	48	-	47	48
Reach Compliance Code	-	compli	compli	-	compli	compli
ECCN code	-	3A991.B.1.A	3A991.B.1.A	-	3A991.B.1.A	3A991.B.1.A
Maximum access time	-	70 ns	70 ns	-	70 ns	70 ns
startup block	-	BOTTOM	BOTTOM	-	TOP	TOP
command user interface	-	YES	YES	-	YES	YES
Universal Flash Interface	-	YES	YES	-	YES	YES
Data polling	-	NO	NO	-	NO	NO
JESD-30 code	-	R-PBGA-B47	R-PDSO-G48	-	R-PBGA-B47	R-PDSO-G48
JESD-609 code	-	e0	e0	-	e0	e0
length	-	10 mm	18.4 mm	-	10 mm	18.4 mm
memory density	-	33554432 bi	33554432 bi	-	33554432 bi	33554432 bi
Memory IC Type	-	FLASH	FLASH	-	FLASH	FLASH
memory width	-	16	16	-	16	16
Humidity sensitivity level	-	3	3	-	3	3
Number of functions	-	1	1	-	1	1
Number of departments/size	-	8,63	8,63	-	8,63	8,63
Number of terminals	-	47	48	-	47	48
word count	-	2097152 words	2097152 words	-	2097152 words	2097152 words
character code	-	2000000	2000000	-	2000000	2000000
Operating mode	-	ASYNCHRONOUS	ASYNCHRONOUS	-	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	-	85 °C	85 °C	-	85 °C	85 °C
Minimum operating temperature	-	-40 °C	-40 °C	-	-40 °C	-40 °C
organize	-	2MX16	2MX16	-	2MX16	2MX16
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	VFBGA	TSOP1	-	VFBGA	TSOP1
Encapsulate equivalent code	-	BGA47,6X8,30	TSSOP48,.8,20	-	BGA47,6X8,30	TSSOP48,.8,20
Package shape	-	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR
Package form	-	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	-	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	-	PARALLEL	PARALLEL	-	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	-	240	240	-	240	240
power supply	-	3/3.3 V	3/3.3 V	-	3/3.3 V	3/3.3 V
Programming voltage	-	3 V	3 V	-	3 V	3 V
Certification status	-	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified
Maximum seat height	-	1 mm	1.2 mm	-	1 mm	1.2 mm
Department size	-	4K,32K	4K,32K	-	4K,32K	4K,32K
Maximum standby current	-	0.000025 A	0.000025 A	-	0.000025 A	0.000025 A
Maximum slew rate	-	0.065 mA	0.065 mA	-	0.065 mA	0.065 mA
Maximum supply voltage (Vsup)	-	3.6 V	3.6 V	-	3.6 V	3.6 V
Minimum supply voltage (Vsup)	-	2.65 V	2.65 V	-	2.65 V	2.65 V
Nominal supply voltage (Vsup)	-	3 V	3 V	-	3 V	3 V
surface mount	-	YES	YES	-	YES	YES
technology	-	CMOS	CMOS	-	CMOS	CMOS
Temperature level	-	INDUSTRIAL	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL
Terminal surface	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	-	BALL	GULL WING	-	BALL	GULL WING
Terminal pitch	-	0.75 mm	0.5 mm	-	0.75 mm	0.5 mm
Terminal location	-	BOTTOM	DUAL	-	BOTTOM	DUAL
Maximum time at peak reflow temperature	-	30	30	-	30	30
switch bit	-	NO	NO	-	NO	NO
type	-	NOR TYPE	NOR TYPE	-	NOR TYPE	NOR TYPE
width	-	7 mm	12 mm	-	7 mm	12 mm
Base Number Matches	-	1	1	-	1	1

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