5962R9582901VEC datasheet, PDF

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5962R9582901VEC: DescriptionBuffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDIP16; Categorylogic logic; File Size200KB，8 Pages; ManufacturerHarris; Websitehttp://www.harris.com/

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5962R9582901VEC Overview

Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDIP16

5962R9582901VEC Parametric

Parameter Name	Attribute value
package instruction	,
Reach Compliance Code	unknown
Other features	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR
series	4000/14000/40000
JESD-30 code	R-GDIP-T16
JESD-609 code	e4
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUFFER
Number of functions	6
Number of entries	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	175.5 ns
Certification status	Not Qualified
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal location	DUAL
total dose	100k Rad(Si) V
Base Number Matches	1

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	5962R9582901VEC	5962R9582901VXC	CD4010BFMSR	CD4010BDMSR	CD4010BHMSR	CD4010BKMSR
Description	Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDIP16	Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDFP16	Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDIP16	Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDIP16	Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS	Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, CDFP16
package instruction	,	,	DIP, DIP16,.3	DIP, DIP16,.3	DIE,	DFP, FL16,.3
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
Other features	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR	DUAL SUPPLY HIGH TO LOW VOLTAGE TRANSLATOR
series	4000/14000/40000	4000/14000/40000	4000/14000/40000	4000/14000/40000	4000/14000/40000	4000/14000/40000
JESD-30 code	R-GDIP-T16	R-CDFP-F16	R-GDIP-T16	R-GDIP-T16	X-XUUC-N14	R-CDFP-F16
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	BUFFER	BUFFER	BUFFER	BUFFER	BUFFER	BUFFER
Number of functions	6	6	6	6	6	6
Number of entries	1	1	1	1	1	1
Number of terminals	16	16	16	16	14	16
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	UNSPECIFIED	RECTANGULAR
Package form	IN-LINE	FLATPACK	IN-LINE	IN-LINE	UNCASED CHIP	FLATPACK
propagation delay (tpd)	175.5 ns	175.5 ns	175.5 ns	175.5 ns	175.5 ns	175.5 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	NO	YES	NO	NO	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	THROUGH-HOLE	FLAT	THROUGH-HOLE	THROUGH-HOLE	NO LEAD	FLAT
Terminal location	DUAL	DUAL	DUAL	DUAL	UPPER	DUAL
JESD-609 code	e4	e4	e0	e0	-	e0
Terminal surface	GOLD	GOLD	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)
total dose	100k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	-	100k Rad(Si) V
Base Number Matches	1	1	1	1	-	-
encapsulated code	-	-	DIP	DIP	DIE	DFP

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