MBM29F033C-70PTR datasheet, PDF

Datasheet> All Categories > storage> storage> MBM29F033C-70PTR

MBM29F033C-70PTR: Description32M (4M X 8) BIT; Categorystorage storage; File Size286KB，46 Pages; ManufacturerFUJITSU; Websitehttp://edevice.fujitsu.com/fmd/en/index.html

Download Datasheet Parametric Compare View All

MBM29F033C-70PTR Overview

32M (4M X 8) BIT

MBM29F033C-70PTR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	FUJITSU
Parts packaging code	TSOP1
package instruction	TSOP1-R, TSSOP40,.8,20
Contacts	40
Reach Compliance Code	unknow
ECCN code	3A991.B.1.A
Maximum access time	70 ns
command user interface	YES
Data polling	YES
JESD-30 code	R-PDSO-G40
JESD-609 code	e0
length	18.4 mm
memory density	33554432 bi
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of departments/size	64
Number of terminals	40
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
organize	4MX8
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1-R
Encapsulate equivalent code	TSSOP40,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
ready/busy	YES
reverse pinout	YES
Maximum seat height	1.2 mm
Department size	64K
Maximum standby current	0.000005 A
Maximum slew rate	0.045 mA
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
switch bit	YES
type	NOR TYPE
width	10 mm

Preview

Download Datasheet

View All

FUJITSU SEMICONDUCTOR

DATA SHEET

DS05-20869-3E

FLASH MEMORY

CMOS

32M (4M

8) BIT

MBM29F033C

-70/-90/-12

FEATURES

• Single 5.0 V read, write, and erase

Minimizes system level power requirements

• Compatible with JEDEC-standard commands

Pinout and software compatible with single-power supply Flash

Superior inadvertent write protection

• 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type)

• Minimum 100,000 write/erase cycles

• High performance

70 ns maximum access time

• Sector erase architecture

Uniform sectors of 64K bytes each

Any combination of sectors can be erased. Also supports full chip erase

• Embedded Erase

Algorithms

Automatically preprograms and erases the chip or any sector

• Embedded Program

Algorithms

Automatically programs and verifies data at specified address

• Data Polling and Toggle Bit feature for detection of program or erase cycle completion

• Ready/BUSY output (RY/BY)

Hardware method for detection of program or erase cycle completion

• Low V

write inhibit

≤

3.2 V

• Hardware RESET pin

Resets internal state machine to the read mode

• Erase Suspend/Resume

Supports reading or programming data to a sector not being erased

• Sector group protection

Hardware method that disables any combination of sector groups from write or erase operation (a sector group

consists of 4 adjacent sectors of 64K bytes each)

• Temporary sector groups unprotection

Hardware method temporarily enable any combination of sectors from write or erase operations

Embedded Erase™, Embedded Program™ and ExpressFlash™ are trademarks of Advanced Micro Devices, Inc.

MBM29F033C

-70/-90/-12

GENERAL DESCRIPTION

The MBM29F033C is a 32M-bit, 5.0 V-Only Flash memory organized as 4M bytes of 8 bits each. The 2M bytes

of data is divided into 64 sectors of 64K bytes for flexible erase capability. The 8 bit of data will appear on DQ

to DQ

. The MBM29F033C is offered in a 40-pin TSOP package. This device is designed to be programmed in-

system with the standard system 5.0 V V

supply. A 12.0 V V

is not required for program or erase operations.

The device can also be reprogrammed in standard EPROM programmers.

The standard MBM29F033C offers access times between 70 ns and 120 ns allowing operation of high-speed

microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write

enable (WE), and output enable (OE) controls.

The MBM29F033C is command set compatible with JEDEC standard single-supply Flash standard. Commands

are written to the command register using standard microprocessor write timings. Register contents serve as

input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally

latch addresses and data needed for the programming and erase operations. Reading data out of the device is

similar to reading from 12.0 V Flash or EPROM devices.

The MBM29F033C is programmed by executing the program command sequence. This will invoke the Embedded

Program

Algorithm which is an internal algorithm that automatically times the program pulse widths and verifies

proper cell margin. Each sector can be programmed and verified in less than 0.5 seconds. Erase is accomplished

by executing the erase command sequence. This will invoke the Embedded Erase

Algorithm which is an

internal algorithm that automatically preprograms the array if it is not already programmed before executing the

erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell

margin.

This device also features a sector erase architecture. The sector erase mode allows for sectors of memory to

be erased and reprogrammed without affecting other sectors. A sector is typically erased and verified within one

second (if already completely preprogrammed). The MBM29F033C is erased when shipped from the factory.

The MBM29F033C device also features hardware sector group protection. This feature will disable both program

and erase operations in any combination of eight sector groups of memory.

A sector group consists of four

adjacent sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31, 32-

35, 36-39, 40-43, 44-47, 48-51, 52-55, 56-59, and 60-63.

Fujitsu has implemented an Erase Suspend feature that enables the user to put erase on hold for any period of

time to read data from or program data to a non-busy sector. Thus, true background erase can be achieved.

The device features single 5.0 V power supply operation for both read and program functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V

detector automatically

inhibits write operations during power transitions. The end of program or erase is detected by Data Polling of

, or by the Toggle Bit I feature on DQ

or RY/BY output pin. Once the end of a program or erase cycle has

been completed, the device automatically resets to the read mode.

The MBM29F033C also has a hardware RESET pin. When this pin is driven low, execution of any Embedded

Program or Embedded Erase operations will be terminated. The internal state machine will then be reset into

the read mode. The RESET pin may be tied to the system reset circuity. Therefore, if a system reset occurs

during the Embedded Program or Embedded Erase operation, the device will be automatically reset to a read

mode. This will enable the system microprocessor to read the boot-up firmware from the Flash memory.

Fujitsu's Flash technology combines years of EPROM and E

PROM experience to produce the highest levels

of quality, reliability, and cost effectiveness. The MBM29F033C memory electrically erases all bits within a sector

simultaneously via Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using the EPROM

programming mechanism of hot electron injection.

MBM29F033C-70PTR Related Products

	MBM29F033C-70PTR	MBM29F033C-90PTN	MBM29F033C-70PTN	MBM29F033C-90PTR	MBM29F033C-70	MBM29F033C-12PTR	MBM29F033C-12PTN	MBM29F033C-90	MBM29F033C-12	MBM29F033C
Description	32M (4M X 8) BIT	Flash, 4MX8, 90ns, PDSO40, TSOP1-40	Flash, 4MX8, 70ns, PDSO40, TSOP1-40	Flash, 4MX8, 90ns, PDSO40, REVERSE, TSOP1-40	32M (4M X 8) BIT	Flash, 4MX8, 120ns, PDSO40, REVERSE, TSOP1-40	Flash, 4MX8, 120ns, PDSO40, TSOP1-40	32M (4M X 8) BIT	32M (4M X 8) BIT	32M (4M X 8) BIT
Parts packaging code	TSOP1	TSOP1	TSOP1	TSOP1	-	TSOP1	TSOP1	-	-	-
package instruction	TSOP1-R, TSSOP40,.8,20	TSOP1-40	TSOP1-40	REVERSE, TSOP1-40	-	REVERSE, TSOP1-40	TSOP1-40	-	-	-
Contacts	40	40	40	40	-	40	40	-	-	-
Reach Compliance Code	unknow	unknown	unknown	unknown	-	unknown	unknown	-	-	-
ECCN code	3A991.B.1.A	EAR99	EAR99	EAR99	-	EAR99	EAR99	-	-	-
Maximum access time	70 ns	90 ns	70 ns	90 ns	-	120 ns	120 ns	-	-	-
JESD-30 code	R-PDSO-G40	R-PDSO-G40	R-PDSO-G40	R-PDSO-G40	-	R-PDSO-G40	R-PDSO-G40	-	-	-
length	18.4 mm	18.4 mm	18.4 mm	18.4 mm	-	18.4 mm	18.4 mm	-	-	-
memory density	33554432 bi	33554432 bit	33554432 bit	33554432 bit	-	33554432 bit	33554432 bit	-	-	-
Memory IC Type	FLASH	FLASH	FLASH	FLASH	-	FLASH	FLASH	-	-	-
memory width	8	8	8	8	-	8	8	-	-	-
Number of functions	1	1	1	1	-	1	1	-	-	-
Number of terminals	40	40	40	40	-	40	40	-	-	-
word count	4194304 words	4194304 words	4194304 words	4194304 words	-	4194304 words	4194304 words	-	-	-
character code	4000000	4000000	4000000	4000000	-	4000000	4000000	-	-	-
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	-	ASYNCHRONOUS	ASYNCHRONOUS	-	-	-
Maximum operating temperature	70 °C	85 °C	70 °C	85 °C	-	85 °C	85 °C	-	-	-
Minimum operating temperature	-20 °C	-40 °C	-20 °C	-40 °C	-	-40 °C	-40 °C	-	-	-
organize	4MX8	4MX8	4MX8	4MX8	-	4MX8	4MX8	-	-	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	-	-	-
encapsulated code	TSOP1-R	TSOP1	TSOP1	TSOP1-R	-	TSOP1-R	TSOP1	-	-	-
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	-	-	-
Package form	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	-	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	-	-	-
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	-	PARALLEL	PARALLEL	-	-	-
Programming voltage	5 V	5 V	5 V	5 V	-	5 V	5 V	-	-	-
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	-	-	-
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	-	1.2 mm	1.2 mm	-	-	-
Maximum supply voltage (Vsup)	5.25 V	5.5 V	5.25 V	5.5 V	-	5.5 V	5.5 V	-	-	-
Minimum supply voltage (Vsup)	4.75 V	4.5 V	4.75 V	4.5 V	-	4.5 V	4.5 V	-	-	-
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	-	5 V	5 V	-	-	-
surface mount	YES	YES	YES	YES	-	YES	YES	-	-	-
technology	CMOS	CMOS	CMOS	CMOS	-	CMOS	CMOS	-	-	-
Temperature level	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL	-	-	-
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	-	GULL WING	GULL WING	-	-	-
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm	-	0.5 mm	0.5 mm	-	-	-
Terminal location	DUAL	DUAL	DUAL	DUAL	-	DUAL	DUAL	-	-	-
type	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	-	NOR TYPE	NOR TYPE	-	-	-
width	10 mm	10 mm	10 mm	10 mm	-	10 mm	10 mm	-	-	-

Recommended Resources

Why is graphite the most important negative electrode material in lithium battery cells?

Capacitive sensor system circuit

RC reverse motor braking circuit

Fully automatic cadmium nickel battery charger circuit

Gas, smoke detector circuit diagram A

Trickle supply method circuit diagram

Does Cosmic have instructions for defining bit operations similar to Keil's sbit?: Does Cosmic have instructions for defining bit operations similar to Keil's sbit?...; joalin stm32/stm8

Adding hardware accelerators to reduce power consumption in embedded systems: The rule of thumb for embedded system design has always been that adding hardware increases power consumption. However, careful use of hardware accelerators breaks this rule of thumb: adding hardware ...; FPGA小牛 FPGA/CPLD

Is there any LDO chip with 3.3V5A output and input voltage around 5V?: [b]Is there any LDO chip with 3.3V 5A output and input voltage around 5V? [/b]...; guazhuaq Power technology

Teach you how to make a mini inverter 1.5V-220V at home: How to make a 1.5V-220V inverter at home? Let's take a look at how this netizen did it, but what is the principle? Welcome to discuss it.Source: https://hackaday.io/project/167471-mini-inverter-15v-to...; okhxyyo Circuit Observation Room

Interrupt function problem: interrupt [UART0RX_VECTOR] void UART0RX (void) #pragma vector=USART0RX_VECTOR __interrupt void usart0_rx (void) Can you explain the difference between them? Why do I always get an error when using the...; yangpeng061 Microcontroller MCU

About the logo problem of transplanting uclinux startup part: The version is linux-2.4.x. I modified some codes according to the reference materials. After make, the printed information does not have the common ucliux logo. I directly enter the Sash command shel...; zl0801 Linux and Android

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components