PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
F
EATURES
•
6 differential 3.3V LVPECL outputs
•
Crystal oscillator interface
•
Output frequency range: 53.125MHz to 125MHz
•
Crystal input frequency: 25MHz
•
Cycle-to-cycle jitter: 25ps (typical)
•
RMS phase jitter at 106.25MHz, using a 25MHz crystal
(637KHz to 10Mhz): 4.15ps
•
Typical Phase noise at 106.25MHz
Offset
Noise Power
100Hz .................. -80dBc/Hz
1KHz ................ -105dBc/Hz
10KHz ................ -125dBc/Hz
100KHz ................ -125dBc/Hz
•
3.3V supply voltage
•
0°C to 70°C ambient operating temperature
•
Industrial termperature information available upon request
G
ENERAL
D
ESCRIPTION
The ICS84324 is a Crystal-to-3.3V LVPECL Fre-
quency Synthesizer with Fanout Buffer and a mem-
HiPerClockS™
ber of the HiPerClockS™ family of High Performance
Clock Solutions from ICS. Output frequency can
be programmed using the feedback and output fre-
quency select pins. The low phase noise characteristics of the
ICS84324 make it an ideal clock source for Fibre Channel 1
and Gigabit Ethernet applications.
,&6
F
UNCTION
T
ABLE
Inputs
MR
1
0
0
0
0
F_SEL1
X
0
0
1
1
F_SEL0
X
0
1
0
1
Output Frequency
F_OUT
LOW
53.125MHz
106.25MHz
62.5MHz
125MHz
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
F_SEL0
F_SEL1
MR
XTAL1
XTAL2
V
EE
V
CCA
V
CC
PLL_SEL
V
EE
V
CC
XTAL1
OSC
XTAL2
0
1
6
Output
Divider
PLL
/
6
/
Q0:Q5
nQ0:nQ5
Feedback
Divider
ICS84324
24-Lead, 300-MIL SOIC
7.5mm x 15.33mm x 2.3mm body package
M Package
Top View
F_SEL1
MR
PLL_SEL
F_SEL0
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
84324AM
www.icst.com/products/hiperclocks.html
1
REV. A JANUARY 22, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
Type
Output
Output
Output
Output
Output
Output
Power
Description
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Core supply pins.
Negative supply pins.
Input
Power
Input
Input
Input
Input
Pullup
Selects between the PLL and cr ystal inputs as the input to the dividers.
When HIGH, selects PLL. When LOW, selects XTAL1, XTAL2.
LVCMOS / LVTTL interface levels.
Analog supply pin.
Cr ystal oscillator interface. XTAL1 is the input. XTAL2 is the output.
Master Reset. When logic HIGH, forces the outputs LOW.
Pulldown When logic LOW, the outputs are enabled.
LVCMOS / LVTTL interface levels.
Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels.
Pullup
Output frequency select pin. LVCMOS / LVTTL interface levels.
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5, 6
7, 8
9, 10
11, 12
13, 16, 24
14, 18
15
17
19, 20
21
22
23
Name
Q0, nQ0
Q1, nQ1
Q2, nQ2
Q3, nQ3
Q4, nQ4
Q5, nQ5
V
CC
V
EE
PLL_SEL
V
CCA
XTAL2, XTAL1
MR
F_SEL1
F_SEL0
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
51
51
Test Conditions
Minimum
Typical
Maximum
4
Units
pF
KΩ
KΩ
84324AM
www.icst.com/products/hiperclocks.html
2
REV. A JANUARY 22, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
4.6V
-0.5V to V
CC
+ 0.5 V
-0.5V to V
CC
+ 0.5V
50°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
CC
Outputs, V
CC
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
X
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
V
CCA
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
135
20
Maximum
3.465
3.465
Units
V
V
mA
mA
T
ABLE
3B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
PLL_SEL, MR,
F_SEL0, F_SEL1
PLL_SEL, MR,
F_SEL0, F_SEL1
MR, F_SEL1
PLL_SEL, F_SEL0
MR, F_SEL1
PLL_SEL, F_SEL0
Test Conditions
Minimum
2
-0.3
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-5
-150
Typical
Maximum
V
CC
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
T
ABLE
3C. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 1.0
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
84324AM
www.icst.com/products/hiperclocks.html
3
REV. A JANUARY 22, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
Test Conditions
Minimum
Typical Maximum
25
70
7
Units
MHz
Ω
pF
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Fundamental
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol Parameter
F
OUT
Output Frequency
Cycle-to-Cycle Jitter ; NOTE 2
Output Skew; NOTE 1, 2
Output Rise Time
Output Fall Time
Output Duty Cycle
Output Pulse Width
t
PERIOD
/2 - TBD
20% to 80%
20% to 80%
200
200
50
t
PERIOD
/2 + TBD
1
Test Conditions
Minimum
53.125
25
TBD
650
650
Typical
Maximum
125
Units
MHz
ps
ps
ps
ps
%
ps
ms
t
jit(cc)
t
sk(o)
t
R
t
F
odc
t
PW
PLL Lock Time
t
LOCK
See Parameter Measurement Information section.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V
CC
/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
84324AM
www.icst.com/products/hiperclocks.html
4
REV. A JANUARY 22, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
T
YPICAL
P
HASE
N
OISE AT
106.25MH
Z
U
SING A
25MH
Z
Q
UARTZ
C
RYSTAL
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1
100
1k
10k
100k
1M
10M
100M
637KHz to 10MHz, 4.15ps RMS
Source
Process Result
10.000 Hz
40.000M Hz
106.250M Hz
Start Freq.
Stop Freq.
Freq. carrier
Mode
Integral
4.15p
Execute
Noise only
sec. rms
Plot
84324AM
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5
REV. A JANUARY 22, 2003
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