Data Sheet
FEATURES
3.3 V Dual-Loop, 50 Mbps to 3.3 Gbps
Laser Diode Driver
ADN2870
GENERAL DESCRIPTION
The ADN2870
1
laser diode driver is designed for advanced SFP
and SFF modules, using SFF-8472 digital diagnostics. The device
features dual-loop control of the average power and extinction
ratio, which automatically compensates for variations in laser
characteristics over temperature and aging. The laser needs only
to be calibrated at 25°C, eliminating the expensive and time
consuming temperature calibration. The ADN2870 supports
single-rate operation from 50 Mbps to 3.3 Gbps or multirate
operation from 155 Mbps to 3.3 Gbps.
Average power and extinction ratios can be set with reference
voltages provided by a microcontroller DAC or by adjustable
resistors. The ADN2870 provides bias and modulation current
monitoring as well as fail alarms and automatic laser shutdown.
The device interfaces easily with the ADuC702x family of
MicroConverters® and with the ADN289x family of limiting
amplifiers to make a complete SFP/SFF transceiver solution. An
SFP reference design is available. The product is available in a
space-saving 4 mm × 4 mm LFCSP specified over the −40°C to
+85°C temperature range.
1
SFP/SFF MSA and SFF-8472 compliant
SFP reference design available
50 Mbps to 3.3 Gbps operation
Dual-loop control of average power and extinction ratio
Typical rise/fall time 60 ps
Bias current range 2 mA to 100 mA
Modulation current range 5 mA to 90 mA
Laser FAIL alarm and automatic laser shutdown (ALS)
Bias and modulation current monitoring
3.3 V operation
4 mm × 4 mm LFCSP
Voltage setpoint control
Resistor setpoint control
RoHS compliant
APPLICATIONS
Multirate OC3 to OC48-FEC SFP/SFF modules
1×/2×/4× Fibre Channel SFP/SFF modules
LX-4 modules
DWDM/CWDM SFP modules
1GE SFP/SFF transceiver modules
V
CC
Tx_FAULT
Tx_FAIL
V
CC
MPD
FAIL
Protected by U.S. Patent 6,414,974.
APPLICATIONS DIAGRAM
V
CC
V
CC
L
ALS
IMODN
R
IMODP
V
CC
LASER
DATAP
DATAN
ANALOG DEVICES
MICROCONTROLLER
DAC
ADC
1kΩ
DAC
PAVSET
PAVREF
CONTROL
RPAV
IMOD
100Ω
IBIAS
CCBIAS
V
CC
R
Z
IBIAS
GND ERREF
1kΩ
ERSET
IBMON
VCC GND
1kΩ
GND
470Ω
GND
IMMON
ADN2870
GND
PAVCAP
GND
ERCAP
GND
04510-001
Figure 1. Application Diagram Showing Microcontroller Interface
Rev. C
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ADN2870
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Applications Diagram ...................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
SFP Timing Specifications ............................................................... 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Optical Waveforms ......................................................................... 10
Multirate Performance Using Low Cost Fabry Perot Tosa
NEC NX7315UA ........................................................................ 10
Dual-Loop Performance Over Temperature Using DFB Tosa
SUMITOMO SLT2486 ............................................................... 10
Data Sheet
Theory of Operation ...................................................................... 11
Dual-Loop Control .................................................................... 11
Control ......................................................................................... 12
Voltage Setpoint Calibration ..................................................... 12
Resistor Setpoint Calibration .................................................... 14
I
MPD
Monitoring .......................................................................... 14
Loop Bandwidth Selection ........................................................ 15
Power Consumption .................................................................. 15
Automatic Laser Shutdown (Tx_Disable)............................... 15
Bias and Modulation Monitor Currents.................................. 15
Data Inputs .................................................................................. 15
Laser Diode Interfacing ............................................................. 16
Alarms .......................................................................................... 17
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
REVISION HISTORY
11/2017—Rev B to Rev. C
Changed CP-24-14 to CP-24-2 .................................... Throughout
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
8/2016—Rev A to Rev. B
Changed CP-24-2 to CP-24-14 .................................... Throughout
Changes to Table 4 ............................................................................ 7
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
3/2008—Rev 0 to Rev. A
Changes to Features, General Description, and Figure 1 ............ 1
Changes to Table 3 ............................................................................ 6
Changes to Figure 5 .......................................................................... 7
Reorganized Layout .......................................................................... 8
Changes to Modulation Control Loop Section .......................... 11
Changes to Operation with Lasers with Temperature-
Dependent Nonlinearity of Laser LI Curve Section .................. 12
Changes to Voltage Setpoint Calibration Section ...................... 12
Changes to Figure 26 and Figure 27............................................. 13
Changes to Resistor Setpoint Calibration Section and I
MPD
Monitoring Section ........................................................................ 14
Changes to Loop Bandwidth Selection Section ......................... 15
Changes to Laser Diode Interfacing Section, Figure 32, and
Figure 33 .......................................................................................... 16
Changes to Table 5.......................................................................... 17
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
8/2004—Revision 0: Initial Version
Rev. C | Page 2 of 20
Data Sheet
SPECIFICATIONS
V
CC
= 3.0 V to 3.6 V. All specifications T
MIN
to T
MAX
, unless otherwise noted.
1
Typical values as specified at 25°C.
Table 1.
Parameter
LASER BIAS CURRENT (IBIAS)
Output Current IBIAS
Compliance Voltage
IBIAS when ALS High
CCBIAS Compliance Voltage
MODULATION CURRENT (IMODP, IMODN)
2
Output Current IMOD
Compliance Voltage
IMOD when ALS High
Rise Time
2, 3
Fall Time
2, 3
Random Jitter
2, 3
Deterministic Jitter
2, 3
Pulse Width Distortion
2, 3
AVERAGE POWER SET (PAVSET)
Pin Capacitance
Voltage
Photodiode Monitor Current (Average Current)
EXTINCTION RATIO SET INPUT (ERSET)
Resistance Range
Voltage
AVERAGE POWER REFERENCE VOLTAGE INPUT (PAVREF)
Voltage Range
Photodiode Monitor Current (Average Current)
EXTINCTION RATIO REFERENCE VOLTAGE INPUT (ERREF)
Voltage Range
DATA INPUTS (DATAP, DATAN)
4
V p-p (Differential)
Input Impedance (Single-Ended)
LOGIC INPUTS (ALS)
V
IH
V
IL
ALARM OUTPUT (FAIL)
5
V
OFF
V
ON
IBMON, IMMON DIVISION RATIO
IBIAS/IBMON
3
IBIAS/IBMON
3
IBIAS/IBMON STABILITY
3, 6
IMOD/IMMON
IBMON Compliance Voltage
Min
2
1.2
1.2
5
1.5
60
60
0.8
90
V
CC
0.05
104
96
1.1
35
30
80
1.35
1200
25
1.35
1
1000
Typ
Max
100
V
CC
0.2
Unit
mA
V
mA
V
mA
V
mA
ps
ps
ps
ps
ps
pF
V
µA
kΩ
V
V
µA
Conditions/Comments
ADN2870
rms
20 mA < IMOD < 90 mA
20 mA < IMOD < 90 mA
1.1
50
1.2
1.1
0.12
120
1.2
Resistor setpoint mode
Resistor setpoint mode
Resistor setpoint mode
Voltage setpoint mode
(RPAV fixed at 1 kΩ)
Voltage setpoint mode
(RPAV fixed at 1 kΩ)
Voltage setpoint mode
(RERSET fixed at 1 kΩ)
ac-coupled
1.2
0.1
1
V
0.4
50
2
2.4
V
Ω
V
V
V
V
0.8
>1.8
<1.3
Voltage required at FAIL for IBIAS and
IMOD to turn off when FAIL asserted
Voltage required at FAIL for IBIAS and
IMOD to stay on when FAIL asserted
11 mA < IBIAS < 50 mA
50 mA < IBIAS < 100 mA
10 mA < IBIAS < 100 mA
85
92
100
100
50
115
108
±5
1.3
0
A/A
A/A
%
A/A
V
Rev. C | Page 3 of 20
ADN2870
Parameter
SUPPLY
I
CC7
V
CC
(with respect to GND)
8
1
2
Data Sheet
Min
Typ
30
3.3
Max
Unit
mA
V
Conditions/Comments
When IBIAS = IMOD = 0
3.0
3.6
Temperature range: −40°C to +85°C.
Measured into a 15 Ω load (22 Ω resistor in parallel with digital scope 50 Ω input) using a 11110000 pattern at 2.5 Gbps, shown in Figure 2.
3
Guaranteed by design and characterization. Not production tested.
4
When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin.
5
Guaranteed by design. Not production tested.
6
IBIAS/IBMON ratio stability is defined in SFF-8472 revision 9 over temperature and supply variation.
7
I
CC
minimum for power calculation (see the Power Consumption section).
8
All VCC pins should be shorted together.
V
CC
V
CC
L
ADN2870
IMODP
C
04510-034
BIAS TEE
80kHz
27GHz
Figure 2. High Speed Electrical Test Output Circuit
Rev. C | Page 4 of 20
Data Sheet
SFP TIMING SPECIFICATIONS
Table 2.
Parameter
ALS Assert Time
ALS Negate Time
1
Time to Initialize, Including Reset of FAIL
1
FAIL Assert Time
ALS to Reset Time
1
ADN2870
Symbol
t_
OFF
t_
ON
t_
INIT
t_
FAULT
t_
RESET
Min
Typ
1
0.83
25
Max
5
0.95
275
100
5
Unit
μs
ms
ms
μs
μs
Conditions/Comments
Time from the rising edge of ALS (Tx_DISABLE) to when
the bias current falls below 10% of nominal.
Time from the falling edge of ALS to when the
modulation current rises above 90% of nominal.
Time from power-on or negation of FAIL using ALS.
Time from fault to FAIL on.
Tx_DISABLE must be held high to reset Tx_FAULT.
Guaranteed by design and characterization. Not production tested.
V
SE
DATAP
DATAN
SFP MODULE
1H
VCC_Tx
3.3V
0.1F
04510-002
DATAP–DATAN
0V
V p-p
DIFF
= 2
×
V
SE
0.1F
10F
04510-003
SFP HOST BOARD
Figure 3. Signal Level Definition
Figure 4. Recommended SFP Supply
Rev. C | Page 5 of 20
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