— Eight 8 Kbytes, sixty-two 64 Kbytes, and eight 8
Kbytes sectors
Manufactured on 170 nm process technology
SecSi (Secured Silicon) Sector (256 Bytes)
—
Factory locked and identifiable:
16 bytes for secure,
random factory Electronic Serial Number; remainder
may be customer data programmed by AMD
—
Customer lockable:
Can be read, programmed or
erased just like other sectors. Once locked, data
cannot be changed
Programmable Burst interface
— Interface to any high performance processor
— Modes of Burst Read Operation:
—
Linear Burst:
4 double words and 8 double words
with wrap around
Program Operation
— Ability to perform synchronous and asynchronous
write operations of burst configuration register
settings independently
Single power supply operation
— Optimized for 2.5 to 2.75 volt read, erase, and
program operations
Compatibility with JEDEC standards (JC42.4)
— Software compatible with single-power supply Flash
— Backward-compatible with AMD Am29LV and Am29F
flash memories
Ultra low power consumption
— Burst Mode Read: 90 mA @ 66 MHz max, capable of
75 MHz (Fortified BGA only)
— Program/Erase: 50 mA max
— Standby mode: CMOS: 60 µA max
1 million write cycles per sector typical
20 year data retention typical
VersatileI/O™ control
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the V
IO
pin
— 1.65 V to 2.75 V compatible I/O signals
Software Features
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector (requires only V
CC
levels)
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector using a user-definable 64-bit password
Supports Common Flash Interface (CFI)
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
Hardware Features
Program Suspend/Resume & Erase Suspend/
Resume
— Suspends program or erase operations to allow
reading, programming, or erasing in same bank
Hardware Reset (RESET#), Ready/Busy# (RY/
BY#), and Write Protect (WP#) inputs
ACC input
— Accelerates programming time for higher throughput
during system production
Package options
— 80-pin PQFP
— 80-ball Fortified BGA
Performance Characteristics
High performance read access
— Initial/random access times as fast as 48 ns
— Burst access time as fast as 7.5 ns for ball grid array
package
Publication Number
30606
Revision
B
Amendment
0
Issue Date
March 22, 2004
The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by
FASL LLC. FASL LLC reserves the right to change or discontinue work on any product without notice. The information in this document is provided
“as
is”
without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of
A d v a n c e
I n f o r m a t i o n
General Description
The S29CD032G is a 32 Megabit, 2.5 Volt-only single power supply burst mode
flash memory device. The device can be configured for 1,048,576 double words.
The device can also be programmed in standard EPROM programmers.
To eliminate bus contention, each device has separate chip enable (CE#), write
enable (WE#) and output enable (OE#) controls. Additional control inputs are re-
quired for synchronous burst operations: Load Burst Address Valid (ADV#), and
Clock (CLK).
Each device requires only a
single 2.5 or 2.6 Volt power supply
(2.5 V to 2.75
V) for both read and write functions. A 12.0-volt V
PP
is not required for program
or erase operations, although an acceleration pin is available if faster program-
ming performance is required.
The device is entirely command set compatible with the
JEDEC single-power-
supply Flash standard.
The software command set is compatible with the com-
mand sets of the 5 V Am29F and 3 V Am29LV Flash families. Commands are
written to the command register using standard microprocessor write timing.
Register contents serve as inputs to an internal state-machine that controls the
erase and programming circuitry. Write cycles also internally latch addresses and
data needed for the programming and erase operations. Reading data out of the
device is similar to reading from other Flash or EPROM devices.
The
Unlock Bypass
mode facilitates faster programming times by requiring only
two write cycles to program data instead of four.
The
Simultaneous Read/Write architecture
provides simultaneous operation
by dividing the memory space into two banks. The device can begin programming
or erasing in one bank, and then simultaneously read from the other bank, with
zero latency. This releases the system from waiting for the completion of program
or erase operations. See Simultaneous Read/Write Operations Overview and Re-
strictions on page 13.
The device provides a 256-byte
SecSi™ (Secured Silicon) Sector
with an one-
time-programmable (OTP) mechanism.
In addition, the device features several levels of sector protection, which can dis-
able both the program and erase operations in certain sectors or sector groups:
Persistent Sector Protection
is a command sector protection method that re-
places the old 12 V controlled protection method;
Password Sector Protection
is a highly sophisticated protection method that requires a password before
changes to certain sectors or sector groups are permitted;
WP# Hardware Pro-
tection
prevents program or erase in the two outermost 8 Kbytes sectors of the
larger bank.
The device defaults to the Persistent Sector Protection mode. The customer must
then choose if the Standard or Password Protection method is most desirable. The
WP# Hardware Protection feature is always available, independent of the other
protection method chosen.
The
VersatileI/O™ (V
CCQ
)
feature allows the output voltage generated on the
device to be determined based on the V
IO
level. This feature allows this device to
operate in the 1.8 V I/O environment, driving and receiving signals to and from
other 1.8 V devices on the same bus.
The host system can detect whether a program or erase operation is complete by
observing the RY/BY# pin, by reading the DQ7 (Data# Polling), or DQ6 (toggle)
2
S29CD032G
30606B0 March 22, 2004
A d v a n c e
I n f o r m a t i o n
status bits.
After a program or erase cycle has been completed, the device is
ready to read array data or accept another command.
The
sector erase architecture
allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low V
CC
detector that automat-
ically inhibits write operations during power transitions. The
password and
software sector protection
feature disables both program and erase opera-
tions in any combination of sectors of memory. This can be achieved in-system
at V
CC
level.
The
Program/Erase Suspend/Erase Resume
feature enables the user to put
erase on hold for any period of time to read data from, or program data to, any
sector that is not selected for erasure. True background erase can thus be
achieved.
The
hardware RESET# pin
terminates any operation in progress and resets the
internal state machine to reading array data.
The device offers two power-saving features. When addresses have been stable
for a specified amount of time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consump-
tion is greatly reduced in both these modes.
AMD’s Flash technology combines years of Flash memory manufacturing experi-
ence to produce the highest levels of quality, reliability and cost effectiveness.
The device electrically erases all bits within a sector simultaneously via
Fowler-Nordheim tunnelling. The data is programmed using hot electron
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Embedded System
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