HMA510GM-55/883 datasheet, PDF

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HMA510GM-55/883: Description16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68; Categorysemiconductor The embedded processor and controller; File Size183KB，9 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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HMA510GM-55/883 Overview

16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68

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HMA510/883

April 1997

16 x 16-Bit CMOS Parallel

Multiplier Accumulator

Description

The HMA510/883 is a high speed, low power CMOS 16 x

16-bit parallel multiplier accumulator capable of operating at

55ns clocked multiply-accumulate cycles. The 16-bit X and Y

operands may be speciﬁed as either two’s complement or

unsigned magnitude format. Additional inputs are provided

for the accumulator functions which include: loading the

accumulator with the current product, adding or subtracting

the accumulator contents and the current product, and pre-

loading the Accumulator Registers from the external inputs.

All inputs and outputs are registered. The registers are all

positive edge triggered, and are latched on the rising edge of

the associated clock signal. The 35-bit Accumulator Output

cant product (LSP), the 16-bit most signiﬁcant product

(MSP), and the 3-bit extended product (XTP) Registers. The

XTP and MSP Registers have dedicated output ports, while

the LSP Register shares the Y-inputs in a multiplexed fash-

ion. The entire 35-bit Accumulator Output Register may be

preloaded at any time through the use of the bidirectional

output ports and the preloaded control.

Features

• This Circuit is Processed in Accordance to MIL-STD-

883 and is Fully Conformant Under the Provisions of

Paragraph 1.2.1.

• 16 x 16-Bit Parallel Multiplication with Accumulation

to a 35-Bit Result

• High-Speed (55ns) Multiply Accumulate Time

• Low Power CMOS Operation

- I

CCSB

= 500µA Maximum

- I

CCOP

= 7.0mA Maximum at 1.0MHz

• HMA510/883 is Compatible with the CY7C510 and the

IDT7210

• Supports Two’s Complement or Unsigned Magnitude

Operations

• Three-State Outputs

Ordering Information

PART NUMBER

HMA510GM-55/883

HMA510GM-65/883

HMA510GM-75/883

TEMP.

RANGE (

-55 to 125

PACKAGE

68 Ld CPGA

PKG.

NO.

G68.B

Block Diagram

X0-15

RND

SUB

Y0-15 P0-15

ACC

CLKY

CLKX

MULTIPLIER ARRAY

PRELOAD

CLKP

ACCUMULATOR

XTP REGISTER

MSP REGISTER

LSP REGISTER

OEX

OEM

OEL

P32-34

P16-31

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

Intersil Corporation 1999

File Number

2807.2

3-10

HMA510/883

Pin Descriptions

NAME

SUB

(Continued)

DESCRIPTION

Subtract Control. When both SUB and ACC are HIGH, the Accumulator Register contents are sub-

tracted from the current product. When ACC is HIGH and SUB is LOW, the Accumulator Register

contents and the current product are summed. The SUB control input is latched on the rising edge of

CLKX or CLKY.

Round Control. When this control is HIGH, a one is added to the most significant bit of the LSP. When

LOW, the product is unchanged.

Preload Control. When this control is HIGH, the three bidirectional ports may be used to preload the

Accumulator Registers. The three-state controls (OEX, OEM, OEL) must be HIGH, and the data will

be preloaded on the rising edge of CLKP. When this control is LOW, the Accumulator Registers func-

tion in a normal manner.

Y-Input/LSP Output Port Three-State Control. When OEL is HIGH, the output drivers are in the high

impedance state. This state is required for Y-data input or preloading the LSP Register. When OEL

is LOW, the port is enabled for LSP output.

MSP Output Port Three-State Control. A LOW on this control line enables the port for output. When

OEM is HIGH, the output drivers are in the high impedance state.

This control must be HIGH for preloading the MSP Register.

XTP Output Port Three-State Control. A LOW on this control line enables the port for output. When

OEX is HIGH, the output drivers are in the high impedance state. This control must be HIGH for pre-

loading the XTP Register.

X-Register Clock. The rising edge of this clock latches the X-Data Input Register along with the TC,

ACC, SUB and RND inputs.

Y-Register Clock. The rising edge of this clock latches the Y-Data Input Register along with the TC,

ACC, SUB and RND inputs.

Product Register Clock. The rising edge of CLKP latches the LSP, MSP and XTP Registers. If the

preload control is active, the data on the I/O ports is loaded into these registers. If preload is not ac-

tive, the accumulated product is loaded into the registers.

TYPE

RND

PREL

OEL

OEM

OEX

CLKX

CLKY

CLKP

3-12

HMA510GM-55/883 Related Products

	HMA510GM-55/883	HMA510/883	HMA5101	HMA510GM-65/883	HMA510GM-65883	HMA510883	HMA510GM-75/883	HMA510GM-55883	HMA510GM-75883
Description	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68	16-BIT, DSP-MULTIPLIER ACCUMULATOR/SUMMER, CPGA68

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