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DPS512C32MKV3-25C

Description
SRAM Module, 512KX32, 25ns, CMOS, 1.190 X 1.190 INCH, 0.250 INCH HEIGHT, HERMETIC SEALED, CERAMIC, MODULE, SLCC, PGA-66
Categorystorage    storage   
File Size655KB,6 Pages
ManufacturerB&B Electronics Manufacturing Company
Download Datasheet Parametric View All

DPS512C32MKV3-25C Overview

SRAM Module, 512KX32, 25ns, CMOS, 1.190 X 1.190 INCH, 0.250 INCH HEIGHT, HERMETIC SEALED, CERAMIC, MODULE, SLCC, PGA-66

DPS512C32MKV3-25C Parametric

Parameter NameAttribute value
MakerB&B Electronics Manufacturing Company
Parts packaging codePGA
package instructionAPGA,
Contacts66
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time25 ns
Other featuresCONFIGURABLE AS 2M X 8
Spare memory width16
JESD-30 codeS-XPGA-P66
memory density16777216 bit
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of ports1
Number of terminals66
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX32
Output characteristics3-STATE
ExportableYES
Package body materialUNSPECIFIED
encapsulated codeAPGA
Package shapeSQUARE
Package formGRID ARRAY, PIGGYBACK
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height6.35 mm
Minimum standby current2 V
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
Base Number Matches1
2Mx8/1Mx16/512Kx32, 20 - 45ns, PGA
30A141-02
D
16 Megabit High Speed CMOS SRAM
DPS512C32MKV3
DESCRIPTION:
The DPS512C32MKV3 ‘’VERSA-STACK’’ module is a
revolutionary new high speed memory subsystem using
Dense-Pac Microsystems’ ceramic Stackable Leadless Chip
Carriers (SLCC) mounted on a co-fired ceramic substrate. It
offers 16 Megabits of SRAM in a package envelope of 1.190
x 1.190 x 0.250 inches.
The DPS512C32MKV3 contains four individual 512K x 8
SRAMs, packaged in their own hermetically sealed SLCCs
making the module suitable for commercial, industrial and
military applications.
By using SLCCs, the ‘’Versa-Stack’’ family of modules offers
a higher board density of memory than available with
conventional through-hole, surface mount, module, or
hybrid techniques.
FEATURES:
Organizations Available:
512K x 32, 1 Meg x 16,
or 2 Meg x 8
Access Times:
20, 25, 35, 45ns
Fully Static Operation
- No clock or refresh required
Low Power Dissipation
Single +5V Power Supply,
±10%
Tolerance
TTL Compatible
Common Data Inputs and Outputs
Low Data Retention Current
66-Pin PGA Special ‘’VERSA-STACK’’
Package with Compatable Footprint
FUNCTIONAL BLOCK DIAGRAM
PIN-OUT DIAGRAM
PIN NAMES
A0 - A18
I/O0 - I/O31
CE0 - CE3
WE0 - WE3
OE
V
DD
V
SS
N.C.
Address Inputs
Data Input/Output
Low Chip Enables
Write Enables
Output Enable
Power (+5V)
Ground
No Connect
30A141-02
REV. D
This document contains information on a product that is currently released
to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the
right to change products or specifications herein without prior notice.
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