HYB39S16160CT-10 datasheet, PDF

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HYB39S16160CT-10: Description16 MBit Synchronous DRAM; Categorystorage storage; File Size105KB，19 Pages; ManufacturerSIEMENS; Websitehttp://www.infineon.com/

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HYB39S16160CT-10 Overview

16 MBit Synchronous DRAM

HYB39S16160CT-10 Parametric

Parameter Name	Attribute value
Maker	SIEMENS
Parts packaging code	TSOP
package instruction	,
Contacts	50
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	7 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-PDSO-G50
memory density	16777216 bi
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	50
word count	1048576 words
character code	1000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX16
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal location	DUAL

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16 MBit Synchronous DRAM

HYB 39S16400/800/160CT-8/-10

• High Performance:

-8

-10

100

Units

MHz

CK(MAX.)

CK3

AC3

CK2

AC2

•

125

• Multiple Burst Read with Single Write

Operation

• Automatic and Controlled Precharge

Command

• Data Mask for Read/Write control

• Dual Data Mask for byte control (× 16)

• Auto Refresh (CBR) and Self Refresh

• Suspend Mode and Power Down Mode

• 4096 refresh cycles/64 ms

• Random Column Address every CLK

(1-N Rule)

• Single 3.3 V

0.3 V Power Supply

• LVTTL Interface

• Plastic Packages:

P-TSOPI-44 400mil width (× 4,

P-TSOPII-50 400mil width (× 16 )

• -8 version for PC100 applications

Fully Synchronous to Positive Clock Edge

0 to 70

°C

operating temperature

Dual Banks controlled by A11 ( Bank Select)

Programmable CAS Latency: 2, 3

Programmable Wrap Sequence:

Sequential or Interleave

• Programmable Burst Length: 1, 2, 4, 8

• Full page (optional) for sequencial wrap

around

The HYB39S16400/800/160CT are dual bank Synchronous DRAM’s based on SIEMENS 0.25

µm

process and organized as 2 banks

2 MBit

4, 2 banks

1 MBit

8 and 2 banks

512 kbit

16 respectively. These synchronous devices achieve high speed data transfer rates up to 125

MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output

data to a system clock. The chip is fabricated with SIEMENS’ advanced 16 MBit DRAM process

technology.

The device is designed to comply with all JEDEC standards set for synchronous DRAM products,

both electrically and mechanically. All of the control, address, data input and output circuits are

synchronized with the positive edge of an externally supplied clock.

Operating the two memory banks in an interleaved fashion allows random access operation to

occur at higher rate than is possible with standard DRAMs. A sequential and gapless data rate of up

to 125 MHz is possible depending on burst length, CAS latency and speed grade of the device.

Auto Refresh (CBR) and Self Refresh operation are supported. These devices operate with a single

3.3V

0.3V power supply and are available in TSOPII packages.

These Synchronous DRAM devices are available with LV-TTL interfaces.

Semiconductor Group

1998-10-01

HYB39S16160CT-10 Related Products

	HYB39S16160CT-10	HYB39S16160CT-8	HYB39S16400-1	HYB39S16400CT-8	HYB39S16400CT-10	HYB39S16800CT-8	HYB39S16800CT-10
Description	16 MBit Synchronous DRAM	16 MBit Synchronous DRAM	16 MBit Synchronous DRAM	16 MBit Synchronous DRAM	16 MBit Synchronous DRAM	16 MBit Synchronous DRAM	16 MBit Synchronous DRAM
Maker	SIEMENS	SIEMENS	-	SIEMENS	SIEMENS	SIEMENS	SIEMENS
Parts packaging code	TSOP	TSOP	-	TSOP	TSOP	TSOP	TSOP
Contacts	50	50	-	50	50	50	50
Reach Compliance Code	unknow	unknow	-	unknow	unknow	unknow	unknow
ECCN code	EAR99	EAR99	-	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	-	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	7 ns	6 ns	-	6 ns	7 ns	6 ns	7 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 code	R-PDSO-G50	R-PDSO-G50	-	R-PDSO-G50	R-PDSO-G50	R-PDSO-G50	R-PDSO-G50
memory density	16777216 bi	16777216 bi	-	16777216 bi	16777216 bi	16777216 bi	16777216 bi
Memory IC Type	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	-	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
memory width	16	16	-	4	4	8	8
Number of functions	1	1	-	1	1	1	1
Number of ports	1	1	-	1	1	1	1
Number of terminals	50	50	-	50	50	50	50
word count	1048576 words	1048576 words	-	4194304 words	4194304 words	2097152 words	2097152 words
character code	1000000	1000000	-	4000000	4000000	2000000	2000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	-	70 °C	70 °C	70 °C	70 °C
organize	1MX16	1MX16	-	4MX4	4MX4	2MX8	2MX8
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	-	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Certification status	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified
self refresh	YES	YES	-	YES	YES	YES	YES
Maximum supply voltage (Vsup)	3.6 V	3.6 V	-	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	-	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	-	YES	YES	YES	YES
technology	CMOS	CMOS	-	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING	-	GULL WING	GULL WING	GULL WING	GULL WING
Terminal location	DUAL	DUAL	-	DUAL	DUAL	DUAL	DUAL

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