HYM72V2005GU-50 datasheet, PDF

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HYM72V2005GU-50: Description3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module; Categorystorage storage; File Size83KB，14 Pages; ManufacturerSIEMENS; Websitehttp://www.infineon.com/

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HYM72V2005GU-50 Overview

3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module

HYM72V2005GU-50 Parametric

Parameter Name	Attribute value
Maker	SIEMENS
Parts packaging code	DIMM
package instruction	,
Contacts	168
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	FAST PAGE WITH EDO
Maximum access time	50 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEELF REFRESH
JESD-30 code	R-XDMA-N168
memory density	150994944 bi
Memory IC Type	EDO DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	168
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
refresh cycle	2048
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	DUAL

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3.3V 2M

64-Bit EDO-DRAM Module

3.3V 2M x 72-Bit EDO-DRAM Module

168pin unbuffered DIMM Module

with serial presence detect

HYM64V2005GU-50/-60

HYM72V2005GU-50/-60

•

168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module

for PC main memory applications

1 bank 2M x 64, 2M x 72 organisation

Optimized for byte-write non-parity or ECC applications

Extended Data Out (EDO)

Performance:

-50

tRAC

tCAC

tAA

tRC

tHPC

RAS Access Time

CAS Access Time

Access Time from Address

Cycle Time

EDO Mode Cycle Time

50 ns

13 ns

25 ns

84 ns

20 ns

-60

60 ns

15 ns

30 ns

104 ns

25 ns

•

Single +3.3 V

0.3 V Power Supply

CAS-before-RAS refresh, RAS-only-refresh

Decoupling capacitors mounted on substrate

All inputs, outputs and clocks are fully LV-TTL compatible

Serial presence detects (optional)

Utilizes 2M

8 -DRAMs in SOJ packages

2048 refresh cycles / 32 ms with 11 / 10 addressing (Row / Column)

Gold contact pad

Card Size: 133,35mm x 25,40 mm x 5,30 mm

This DRAM product module family is intended to be fully pin and architecture compatible

with the 168pin unbuffered SDRAM DIMM module family

Semiconductor Group

2.97

HYM72V2005GU-50 Related Products

	HYM72V2005GU-50	Q67100-Q2183	Q67100-Q2182	Q67100-Q2181	Q67100-Q2180	HYM64V2005GU-50	HYM64V2005GU-60	HYM72V2005GU-60
Description	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module	3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module

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