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IDT7005S70J

Description
8KX8 DUAL-PORT SRAM, 35ns, PQCC68
Categorystorage   
File Size211KB,20 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric View All

IDT7005S70J Overview

8KX8 DUAL-PORT SRAM, 35ns, PQCC68

IDT7005S70J Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals68
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
maximum access time35 ns
Processing package description0.950 X 0.950 INCH, 0.120 INCH HEIGHT, PLASTIC, LCC-68
stateACTIVE
CraftsmanshipCMOS
packaging shapeSQUARE
Package SizeCHIP CARRIER
surface mountYes
Terminal formJ BEND
Terminal spacing1.27 mm
terminal coatingTIN LEAD
Terminal locationQUAD
Packaging MaterialsPLASTIC/EPOXY
Temperature levelCOMMERCIAL
memory width8
organize8K X 8
storage density65536 deg
operating modeASYNCHRONOUS
Number of digits8192 words
Number of digits8K
Memory IC typeDUAL-PORT SRAM
serial parallelPARALLEL
HIGH-SPEED
8K x 8 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT7005S/L
FEATURES:
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• High-speed access
— Military: 20/25/35/55/70ns (max.)
— Commercial:15/17/20/25/35/55ns (max.)
• Low-power operation
— IDT7005S
Active: 750mW (typ.)
Standby: 5mW (typ.)
— IDT7005L
Active: 750mW (typ.)
Standby: 1mW (typ.)
• IDT7005 easily expands data bus width to 16 bits or
more using the Master/Slave select when cascading
more than one device
• M/
S
= H for
BUSY
output flag on Master,
M/
S
= L for
BUSY
input on Slave
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of Semaphore signaling
between ports
• Fully asynchronous operation from either port
• Devices are capable of withstanding greater than 2001V
electrostatic discharge
• Battery backup operation—2V data retention
• TTL-compatible, single 5V (±10%) power supply
• Available in 68-pin PGA, 68-pin quad flatpack, 68-pin
PLCC, and a 64-pin TQFP
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT7005 is a high-speed 8K x 8 Dual-Port Static RAM.
The IDT7005 is designed to be used as a stand-alone Dual-
Port RAM or as a combination MASTER/SLAVE Dual-Port
FUNCTIONAL BLOCK DIAGRAM
OE
L
R/
OE
R
R/
CE
L
W
L
CE
R
W
R
I/O
0L
- I/O
7L
I/O
Control
I/O
Control
I/O
0R
-I/O
7R
BUSY
L
(1,2)
BUSY
R
Address
Decoder
13
(1,2)
A
12L
A
0L
MEMORY
ARRAY
Address
Decoder
A
12R
A
0R
13
NOTES:
1. (MASTER):
BUSY
is output;
(SLAVE):
BUSY
is input.
2.
BUSY
outputs
and
INT
outputs
are non-tri-stated
push-pull.
OE
L
R/
CE
L
W
L
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
R
R/
OE
R
W
R
SEM
R
(2)
SEM
L
(2)
INT
L
M/
S
INT
R
2738 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2738/6
6.06
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