stack is pushed down one register posi- put on the CAS
15-0
inputs during that
tion. When EN
N
is HIGH, the data in clock cycle will be registered and accu-
the
N
pipeline register stack does not mulated internally. When CASEN is
change, and the data in the
N
input HIGH, the CAS
15-0
inputs are ignored.
register will not be stored in the register
stack.
FT — Feedthrough Control
When FT is LOW and ADEL–DDEL =
0000, data being input on the CAS
15-0
inputs is delayed three clock cycles to
N
DEL (
N
= A, B, C, or D) is the 4-bit align the data with the data being input
registered pipeline delay select word. on the A
11-0
–D
11-0
inputs. When FT is
N
DEL determines which stage of the
N
HIGH, the cascade data being input is
pipeline register stack is routed to the routed around the three delay registers
multiplier inputs. The minimum delay to simplify the cascading of multiple
is one clock cycle (
N
DEL = 0000), and devices.
the maximum delay is 16 clock cycle
(
N
DEL = 1111). Upon power up, the
values of ADEL–DDEL and the con-
tents of the pipeline register stacks are
unknown and must be initialized by the
user.
ADEL
3-0
–DDEL
3-0
— Pipeline Delay
Select
1
2
3
4
5
6
7
8
9
10
11
Video Imaging Products
3
08/16/2000–LDS.2249-J
LF2249
DEVICES INCORPORATED
12 x 12-bit Digital Mixer
M
AXIMUM
R
ATINGS
Above which useful life may be impaired (Notes 1, 2, 3, 8)
Storage temperature ........................................................................................................... –65°C to +150°C
Operating ambient temperature ........................................................................................... –55°C to +125°C
V
CC
supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V
Input signal with respect to ground ............................................................................... –0.5 V to V
CC
+ 0.5 V
Signal applied to high impedance output ...................................................................... –0.5 V to V
CC
+ 0.5 V
Output current into low outputs ............................................................................................................. 25 mA
Latchup current ............................................................................................................................... > 400 mA
O
PERATING
C
ONDITIONS
To meet specified electrical and switching characteristics
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DSP and ARM Processors
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