NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog
switch
Rev. 3.1 — 20 October 2016
Product data sheet
1. General description
The NX3DV42 is a double-pole double-throw analog switch suitable for use as an analog
or digital multiplexer/demultiplexer. Its wide bandwidth and low bit-to-bit skew allows the
NX3DV42 to pass high-speed differential signals with good signal integrity. Its high
channel to channel crosstalk rejection results in minimal noise interference. The
bandwidth is wide enough to pass high-speed USB 2.0 differential signals (480 Mb/s). It
consist of two switches, each with two independent input/outputs (HSDn+ and HSDn)
and a common input/output (D+ or D). One digital input (S) is used to select the switch
position. When pin OE is HIGH, the switches are turned off. Schmitt trigger action at the
select input (S) and output enable input (OE) makes the circuit tolerant to slower input rise
and fall times across the entire V
CC
range from 3.0 V to 4.3 V.
2. Features and benefits
Supply voltage range from 3.0 V to 4.3 V
4
typical ON resistance
7.3 pF typical ON capacitance
950 MHz typical bandwidth or data frequency
Low crosstalk of
30
dB at 240 MHz
Break-before-make switching
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
CDM AEC-Q100-011 revision B exceeds 1000 V
HBM exceeds 12000 V for power to GND protection
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Specified from
40 C
to +125
C
3. Applications
Cell phone, PDA, digital camera and notebook
LCD monitor, TV and set-top box
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
4. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
NX3DV42GU
NX3DV42GU10
NX3DV42GU33
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
XQFN10
XQFN10
Description
plastic, extremely thin quad flat package; no leads;
10 terminals; body 1.40 x 1.80 x 0.50 mm
Version
SOT1160-1
Type number
plastic extremely thin small outline package; no leads; SOT1337-1
10 terminals; body 1.3 x 1.6 x 0.5 mm
X2QFN10 plastic extremely thin small outline package; no leads; SOT1430-1
10 terminals; body 1.3 x 1.6 x 0.33 mm
5. Marking
Table 2.
Marking
Marking code
x4
x4
x4
Type number
NX3DV42GU
NX3DV42GU10
NX3DV42GU33
6. Functional diagram
HSD1-
D-
HSD2-
HSD1+
D+
HSD2+
S
OE
aaa-001356
Fig 1.
Logic symbol
NX3DV42
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 3 — 20 October 2016
2 of 20
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
7. Pinning information
7.1 Pinning
NX3DV42
9 V
CC
terminal 1
index area
10 S
8 OE
7 HSD2+
6 HSD2-
HSD1+ 5
aaa-001357
D+ 1
D- 2
GND 3
Transparent top view
Fig 2.
Pin configuration SOT1160-1(XQFN10), SOT1337-1 (XQFN10) and
SOT1430-1(X2QFN10)
7.2 Pin description
Table 3.
Symbol
HSD1, HSD2
HSD1+, HSD2+
D+, D
GND
OE
S
V
CC
Pin description
SOT1160-1, SOT1337-1,
SOT1430-1
4, 6
5, 7
1, 2
3
8
10
9
Description
independent input or output
independent input or output
common output or input
ground (0 V)
output enable input (active LOW)
select input
supply voltage
8. Functional description
Table 4.
Input
S
L
H
X
[1]
Function table
[1]
Channel on
OE
L
L
H
HSD1+ and HSD1
HSD2+ and HSD2
switch off
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
NX3DV42
All information provided in this document is subject to legal disclaimers.
HSD1- 4
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 3 — 20 October 2016
3 of 20
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
SW
I
IK
I
SK
I
SW
I
CC
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
switch voltage
input clamping current
switch clamping current
switch current
supply current
storage temperature
total power dissipation
Conditions
pins S and OE
V
I
<
0.5
V
V
I
<
0.5
V
[1]
Min
0.5
0.5
0.5
50
50
-
-
65
Max
+5.5
+5.5
+5.5
-
-
100
+50
+150
250
Unit
V
V
V
mA
mA
mA
mA
C
mW
T
amb
=
40 C
to +125
C
[2]
-
The minimum input voltage rating may be exceeded if the input current rating is observed.
For XQFN10 package: above 100
C
derate linearly with 4 mW/K.
10. Recommended operating conditions
Table 6.
V
CC
V
I
V
SW
T
amb
[1]
Recommended operating conditions
Conditions
pins S and OE
[1]
Symbol Parameter
supply voltage
input voltage
switch voltage
ambient temperature
Min
3.0
0
0
40
Max
4.3
4.5
V
CC
+125
Unit
V
V
V
C
To avoid sinking GND current from terminals D+ and D when switch current flows in terminals HSDn+ and HSDn, the voltage drop
across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals D+ and D, no GND current will flow from
terminals HSDn+ and HSDn. In this case, there is no limit for the voltage drop across the switch.
NX3DV42
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 3 — 20 October 2016
4 of 20
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
V
IH
V
IL
V
IK
I
I
HIGH-level
input voltage
LOW-level
input voltage
Conditions
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.3 V
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.3 V
T
amb
=
40 C
to +85
C
Min
1.3
1.7
-
-
-
-
Typ
[1]
-
-
-
-
-
-
Max
-
-
0.5
0.7
1.2
1
T
amb
=
40 C
to +125
C
Unit
Min
1.3
1.7
-
-
-
-
Max
-
-
0.5
0.7
1.2
10
V
V
V
V
V
A
input clamping V
CC
= 3.0 V; I
I
=
18
mA
voltage
input leakage
current
OFF-state
leakage
current
power-off
leakage
current
pins S and OE;
V
I
= GND to 4.3 V; V
CC
= 4.3 V;
see
Figure 4
V
CC
= 4.3 V; see
Figure 3
and
Figure 6
V
I
or V
O
= 0 V to 4.3 V;
V
CC
= 0 V; see
Figure 7
I
S(OFF)
-
-
1
-
2
A
I
OFF
-
-
1
-
10
A
I
CC
supply current V
I
= V
CC
or GND; V
CC
= 4.3 V;
V
SW
= GND or V
CC
; see
Figure 5
additional
V
I
= 2.6 V; V
CC
= 4.3 V;
supply current V
SW
= GND or V
CC
V
I
= 1.8 V; V
CC
= 4.3 V;
V
SW
= GND or V
CC
-
-
1
-
10
A
I
CC
-
-
-
-
-
-
-
1.0
2.8
7.3
10
15
-
-
-
-
-
-
-
-
10
15
-
-
-
A
A
pF
pF
pF
C
I
C
S(OFF)
C
S(ON)
input
capacitance
OFF-state
capacitance
ON-state
capacitance
pins S and OE
pins HSDn+ and HSDn
V
CC
= 3.3 V; V
I
= 0 V to 3.3 V
pins D+ and DV
CC
= 3.3 V;
V
I
= 0 V to 3.3 V
[1]
Typical values are measured at T
amb
= 25
C
and V
CC
= 3.3 V.
NX3DV42
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 3 — 20 October 2016
5 of 20
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