GS88037BT-V datasheet, PDF - EEWORLD Datasheet

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GS88037BT-V: Description256K x 36 9Mb Sync Burst SRAM; File Size525KB，19 Pages; ManufacturerGSI Technology; Websitehttp://www.gsitechnology.com/

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GS88037BT-V Overview

256K x 36 9Mb Sync Burst SRAM

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GS88037BT-xxxV

100-Pin TQFP

Commercial Temp

Industrial Temp

Features

• Single Cycle Deselect (SCD) operation

• 1.8 V or 2.5 V +10%/–10% core power supply

• 1.8 V or 2.5 V I/O supply

• LBO pin for Linear or Interleaved Burst mode

• Internal input resistors on mode pins allow floating mode pins

• Default to Interleaved Pipeline mode

• Byte Write (BW) and/or Global Write (GW) operation

• Internal self-timed write cycle

• Automatic power-down for portable applications

• JEDEC-standard 100-lead TQFP package

• RoHS-compliant 100-lead TQFP package available

256K x 36

9Mb Sync Burst SRAM

250 MHz–200 MHz

1.8 V or 2.5 V V

1.8 V or 2.5 V I/O

Burst mode, subsequent burst addresses are generated

internally and are controlled by ADV. The burst address

counter may be configured to count in either linear or

interleave order with the Linear Burst Order (LBO) input. The

Burst function need not be used. New addresses can be loaded

on every cycle with no degradation of chip performance.

SCD Pipelined Reads

The GS88037BT-xxxV is a SCD (Single Cycle Deselect)

pipelined synchronous SRAM. DCD (Dual Cycle Deselect)

versions are also available. SCD SRAMs pipeline deselect

commands one stage less than read commands. SCD RAMs

begin turning off their outputs immediately after the deselect

command has been captured in the input registers.

Byte Write and Global Write

Byte write operation is performed by using Byte Write enable

(BW) input combined with one or more individual byte write

signals (Bx). In addition, Global Write (GW) is available for

writing all bytes at one time, regardless of the Byte Write

control inputs.

Sleep Mode

Low power (Sleep mode) is attained through the assertion

(High) of the ZZ signal, or by stopping the clock (CK).

Memory data is retained during Sleep mode.

Core and Interface Voltages

The GS88037BT-xxxV operates on a 1.8 V or 2.5 V power

supply. All input are 2.5 V and 1.8 V compatible. Separate

output power (V

DDQ

) pins are used to decouple output noise

from the internal circuits and are 2.5 V and 1.8 V compatible.

Functional Description

Applications

The GS88037BT-xxxV is a 9,437,184-bit (8,388,608-bit for

x32 version) high performance synchronous SRAM with a

2-bit burst address counter. Although of a type originally

developed for Level 2 Cache applications supporting high

performance CPUs, the device now finds application in

synchronous SRAM applications, ranging from DSP main

store to networking chip set support.

Controls

Addresses, data I/Os, chip enables (E1, E2, E3), address burst

control inputs (ADSP, ADSC, ADV), and write control inputs

(Bx, BW, GW) are synchronous and are controlled by a

positive-edge-triggered clock input (CK). Output enable (G)

and power down control (ZZ) are asynchronous inputs. Burst

cycles can be initiated with either ADSP or ADSC inputs. In

Parameter Synopsis

Pipeline

3-1-1-1

tCycle

Curr

(x36)

-250

2.5

4.0

330

-200

2.5

5.0

270

Unit

Rev: 1.03 6/2006

1/19

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS88037BT-V Related Products

	GS88037BT-V	GS88037BT-200V	GS88037BT-250IV	GS88037BT-250V	GS88037BT-200IV	GS88037BGT-250V	GS88037BGT-250IV	GS88037BGT-200V	GS88037BGT-200IV
Description	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM	256K x 36 9Mb Sync Burst SRAM
Is it Rohs certified?	-	incompatible	incompatible	incompatible	incompatible	conform to	conform to	conform to	conform to
Maker	-	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology
Parts packaging code	-	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP
package instruction	-	LQFP,	LQFP,	LQFP,	LQFP,	LQFP,	LQFP,	LQFP,	LQFP,
Contacts	-	100	100	100	100	100	100	100	100
Reach Compliance Code	-	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	-	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B
Maximum access time	-	2.5 ns	2.5 ns	2.5 ns	2.5 ns	2.5 ns	2.5 ns	2.5 ns	2.5 ns
Other features	-	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY	PIPELINED ARCHITECTURE; ALSO OPERATES AT 2.5V SUPPLY
JESD-30 code	-	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100
length	-	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm
memory density	-	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit
Memory IC Type	-	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
memory width	-	36	36	36	36	36	36	36	36
Number of functions	-	1	1	1	1	1	1	1	1
Number of terminals	-	100	100	100	100	100	100	100	100
word count	-	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words
character code	-	256000	256000	256000	256000	256000	256000	256000	256000
Operating mode	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	-	70 °C	85 °C	70 °C	85 °C	70 °C	85 °C	70 °C	85 °C
organize	-	256KX36	256KX36	256KX36	256KX36	256KX36	256KX36	256KX36	256KX36
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP
Package shape	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	-	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Parallel/Serial	-	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	260	260	260	260
Certification status	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	-	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm
Maximum supply voltage (Vsup)	-	2 V	2 V	2 V	2 V	2 V	2 V	2 V	2 V
Minimum supply voltage (Vsup)	-	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	-	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	-	YES	YES	YES	YES	YES	YES	YES	YES
technology	-	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	-	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
Terminal form	-	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	-	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	-	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	-	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm

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