capacitance lateral DMOS switches. Charge injection has
been minimized to optimize performance in fast sample-and-
hold applications.
Each switch conducts equally well in both directions when on
and blocks up to 16 V
p-p
when off. Capacitances have been
minimized to ensure fast switching and low-glitch energy. To
achieve such fast and clean switching performance, the
DG611, DG612, DG613 are built on the Vishay Siliconix
proprietary D/CMOS process. This process combines
n-channel DMOS switching FETs with low-power CMOS
control logic and drivers. An epitaxial layer prevents latchup.
The DG611 and DG612 differ only in that they respond to
opposite logic levels. The versatile DG613 has two normally
open and two normally closed switches. It can be given
various configurations, including four SPST, two SPDT, one
DPDT.
For additional information see Applications Note AN207.
FEATURES
•
•
•
•
•
•
Fast switching - t
ON
: 12 ns
Low charge injection: ± 2 pC
Wide bandwidth: 500 MHz
5 V CMOS logic compatible
Low R
DS(on)
: 18
Low quiescent power : 1.2 nW
•
Single supply operation
BENEFITS
•
•
•
•
•
•
Improved data throughput
Minimal switching transients
Improved system performance
Easily interfaced
Low insertion loss
Minimal power consumption
APPLICATIONS
•
•
•
•
•
•
•
•
Fast sample-and-holds
Synchronous demodulators
Pixel-rate video switching
Disk/tape drives
DAC deglitching
Switched capacitor filters
GaAs FET drivers
Satellite receivers
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG611
IN
1
D
1
S
1
V-
GND
S
4
D
4
IN
4
1
2
3
4
5
6
7
8
16
15
14
IN
2
D
2
S
2
V+
V
L
S
3
D
3
IN
3
9
10
11
12 13
D
4
IN
4
NC IN
3
D
3
Key
S
1
V-
NC
GND
S
4
4
5
6
7
8
3
2
DG611
D
1
IN
1
NC IN
2
D
2
1
20
19
18
17
S
2
V+
NC
V
L
S
3
Four SPST Switches per Package
TRUTH TABLE
Logic
0
1
Logic “0”
1 V
Logic “1”
4
V
DG611
ON
OFF
DG612
OFF
ON
Dual-In-Line
13
and SOIC
Top View
12
11
10
9
LCC
Top View
16
15
14
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
1
DG611, DG612, DG613
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG613
IN
1
D
1
S
1
V-
GND
S
4
D
4
IN
4
1
2
3
4
5
6
7
8
16
15
14
IN
2
D
2
S
2
Key
S
1
V-
NC
GND
S
4
4
5
6
7
8
9
10
3
2
DG613
D
1
IN
1
NC
1
IN
2
D
2
19
18
17
S
2
V+
NC
V
L
S
3
20
Four SPST Switches per Package
TRUTH TABLE
Logic
0
1
Logic “0”
1 V
Logic “1”
4
V
SW
1
, SW
4
OFF
ON
SW
2
, SW
3
ON
OFF
Dual-In-Line
13 V+
and SOIC
Top View
12
11
10
9
V
L
S
3
D
3
IN
3
LCC
Top View
16
15
14
11 12
13
D
4
IN
4
NC IN
3
D
3
ORDERING INFORMATION
Temp. Range
DG611, DG612
DG611DJ
DG611DJ-E3
DG612DJ
DG612DJ-E3
DG611DY
DG611DY-E3
DG611DY-T1
DG611DY-T1-E3
DG612DY
DG612DY-E3
DG612DY-T1
DG612DY-T1-E3
DG613DJ
DG613DJ-E3
DG613DY
DG613DY-E3
DG613DY-T1
DG613DY-T1-E3
Package
Part Number
16-Pin Plastic DIP
- 40 °C to 85 °C
16-Pin Narrow SOIC
DG613
16-Pin Plastic DIP
- 40 °C to 85 °C
16-Pin Narrow SOIC
www.vishay.com
2
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
DG611, DG612, DG613
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
V+ to V-
V+ to GND
V- to GND
V
L
to GND
V
INa
V
S
, V
Da
Continuous Current (Any Terminal)
Current, S or D (Pulsed at 1 µs, 10 % Duty Cycle)
Storage Temperature
CerDIP
Plastic
16-Pin Plastic DIP
c
Power Dissipation (Package)
b
16-Pin Narrow SOIC
16-Pin CerDIP
20-Pin LCC
e
e
d
Limit
- 0.3 to 21
- 0.3 to 21
- 19 to 0.3
- 1 to (V+) + 1
or 20 mA, whichever occurs first
(V-) - 1 to (V+) + 1
or 20 mA, whichever occurs first
(V-) - 0.3 to (V+) + 16
or 20 mA, whichever occurs first
± 30
± 100
- 65 to 150
- 65 to 125
470
600
900
900
Unit
V
mA
°C
mW
Notes:
a. Signals on S
X
, D
X
, or IN
X
exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 7.6 mW/°C above 75 °C.
e. Derate 12 mW/°C above 75 °C.
RECOMMENDED OPERATING RANGE
Parameter
V+
V-
V
L
V
IN
V
ANALOG
Limit
5 to 21
- 10 to 0
4 to V+
0 to V
L
V- to (V+) - 5
V
Unit
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
3
DG611, DG612, DG613
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 3 V
V
L
= 5 V, V
IN
= 4 V, 1 V
f
V- = - 5 V, V+ = 12 V
I
S
= - 1 mA, V
D
= 0 V
V
S
= 0 V, V
D
= 10 V
V
S
= 10 V, V
D
= 0 V
V
S
= V
D
= 0 V
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.
b
Full
Room
Full
Room
Room
Hot
Room
Hot
Room
Hot
Full
Full
Room
Hot
Room
V
S
= 0 V
V
D
= 0 V
V
S
= V
D
= 0 V
R
L
= 50
R
L
= 300
C
L
= 3 pF
V
S
= ± 2 V,
See test circuit, figure 2
R
L
= 300
C
L
= 75 pF
V
S
= ± 2 V,
See test circuit, figure 2
C
L
= 1 nF, V
S
= 0 V
C
L
= 1 nF,
|
V
S
|
3 V
R
IN
= 50
R
L
= 50
f = 5 MHz
R
IN
= 10
,
R
L
= 50
f = 5 MHz
Room
Room
Room
Room
Room
Room
Room
Full
Room
Full
Room
Room
Room
Room
0.005
5
3
2
10
500
12
8
19
16
4
3
74
dB
87
4
4
25
20
35
50
25
35
25
20
35
50
25
35
ns
MHz
pF
Typ.
c
Min.
d
-5
18
2
± 0.001
± 0.001
± 0.001
Max.
d
7
45
60
0.25
20
0.25
20
0.4
40
Min.
d
-5
Max.
d
7
45
60
0.25
20
0.25
20
0.4
40
Unit
V
Parameter
Analog Switch
Analog Signal Range
e
Switch On-Resistance
Resistance Match Bet Ch.
Source Off Leakage
Drain Off Leakage Current
Switch On Leakage Current
Digital Control
Input Voltage High
Input Voltage Low
Input Current
Input Capacitance
Dynamic Characteristics
Off State Input Capacitance
Off State Output Capacitance
On State Input Capacitance
Bandwidth
Turn-On Time
e
Symbol
V
ANALOG
R
DS(on)
R
DS(on)
I
S(off)
I
D(off)
I
D(on)
V
IH
V
IL
I
IN
C
IN
C
S(off)
C
D(off)
C
S(on)
BW
t
ON
t
OFF
t
ON
t
OFF
Q
Q
OIRR
X
TALK
- 0.25
- 20
- 0.25
- 20
- 0.4
- 40
4
-1
- 20
- 0.25
- 20
- 0.25
- 20
- 0.4
- 40
4
nA
1
1
20
-1
- 20
1
1
20
V
µA
pF
Turn-Off Time
e
Turn-On Time
Turn-Off Time
Charge Injection
e
Ch. Injection Change
e,g
Off Isolation
e
Crosstalk
e
Power Supplies
Positive Supply Current
Negative Supply Current
Logic Supply Current
Ground Current
pC
I+
I-
V
IN
= 0 V or 5 V
I
L
I
GND
Room
Full
Room
Full
Room
Full
Room
Full
0.005
- 0.005
0.005
- 0.005
-1
-5
-1
-5
1
5
-1
-5
1
5
-1
-5
1
5
µA
1
5
www.vishay.com
4
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
DG611, DG612, DG613
Vishay Siliconix
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
a
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 3 V
V
L
= 5 V, V
IN
= 4 V, 1 V
f
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.
b
Full
I
S
= - 1 mA, V
D
= 1 V
R
L
= 300
C
L
= 3 pF
V
S
= 2 V,
See test circuit, figure 2
Room
Room
Room
25
15
10
Ty.p
c
Min.
d
0
Max.
d
7
60
30
25
Min.
d
0
Max.
d
7
60
30
25
ns
Unit
V
Parameter
Analog Switch
Analog Signal Range
e
Switch On-Resistance
Dynamic Characteristics
Turn-On Time
e
Turn-Off Time
e
Symbol
V
ANALOG
R
DS(on)
t
ON
t
OFF
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
g.
Q
=
|
Q at V
S
= 3 V - Q at V
S
= - 3 V
|
.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
[align=left]During the National Day holiday, I could have taken a good rest, but I had too many things to do and didn't sort out the data I measured before in time, so I plan to enrich myself and have...
The premise is that you have a complete Keil project. For example, when debugging ADC, the serial port is often used. Here we teach you how to use the Printf function. Add Printf.txt to the program. 1...
[i=s] This post was last edited by paulhyde on 2014-9-15 09:17 [/i] I heard that the 2009 exam questions were leaked online. Is this true? What do you think?...
Recently, the poor signal coverage of 5G millimeter wave has caused controversy in the industry. Can a leaf, a piece of paper, or even a drop of water block the millimeter wave 5G signal? After readin...
[img=350,350]http://img10.360buyimg.com/n1/19289/86a7c8d5-8a9d-499e-9d68-ea1ada28cd5a.jpg[/img] Design and Implementation of DSP Real-time Multitasking Operating System (Wu Kejun et al.) [url=https://...
From the description of the driver, it should be literally understood as "system process monitoring driver". Please help me analyze what process this driver file monitors and how to simulate a program...
Toshiba Photorelays TLP3547 Review
京公网安备 11010802033920号
EEWORLD
