Ordering number : ENN7253
CMOS IC
LC723481W,723482W,723483W
Low-Voltage ETR-Controller
Overview
The LC723481W, 723482W, and 723483W are low-
voltage electronic tuning radio microcontrollers that
include a PLL that operates up to 250 MHz and a 1/4 duty
1/2 bias LCD driver on chip. These ICs include an on-chip
DC-DC converter, making it is easy to create the supply
voltages required for tuning and allowing cost reductions
in end products.
These ICs are optimal for use in low-voltage portable
audio equipment that includes a radio receiver.
Package Dimensions
unit: mm
3190A-SQFP64
[LC723481W/2W/3W]
0.5
12.0
10.0
48
49
33
32
Function
• Program memory (ROM):
— 2048
×
16 bits (4K bytes)
LC723481W
— 3072
×
16 bits (6K bytes)
LC723482W
— 4096
×
16 bits (8K bytes)
LC723483W
• Data memory (RAM):
— 128
×
4 bits
LC723481W
— 192
×
4 bits
LC723482W
— 256
×
4 bits
LC723483W
• Cycle time: 40 µs (all 1-word instructions) at 75kHz
crystal oscillation
• Stack: 4 levels (8 levels)
LC723481W(LC723482W/3W)
• LCD driver: 48 to 80 segments (1/4 duty, 1/2 bias drive)
• Interrupts: One external interrupt
Timer interrupts (1, 5, 10, and 50 ms)
• A/D converter: Three input channels
(5-bit successive approximation
conversion)
• Input ports: 7 ports (of which 3 can be switched for use
as A/D converter inputs)
• Output ports: 6 ports (of which 1 can be switched for use
as the beep tone output and 2 are open-
drain ports)
Continued on next page.
64
1
(0.5)
(1.25)
(1.5)
17
16
0.18
0.15
1.7max
0.1
10.0
12.0
SANYO: SQFP64
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
N2002RM (OT) No. 7253-1/15
LC723481W/2W/3W
Continued from preceding page.
•
•
•
•
•
•
•
•
•
I/O ports: 16 pins (Of these 8 can be switched over to
function as LCD ports as a mask options.)
PLL: Dead band control is supported. (Four types)
Reference frequencies: 1, 3, 3.125, 5, 6.25, 12.5,
and 25 kHz
Input frequencies: FM band: 10 to 250 MHz
AM band: 0.5 to 40 MHz
Input sensitivity:
FM band: 35 mVrms (50 mVrms at 130 MHz or higher
frequency)
AM band: 35 mVrms
IF counting: Using the HCTR input pin for 0.4 to
12 MHz signals
External reset input: During CPU and PLL operations,
instruction execution is started from
location 0.
Built-in power-on reset circuit:
The CPU starts execution from location 0 when power is
first applied.
Halt mode: The controller-operating clock is stopped.
Backup mode: The crystal oscillator is stopped.
Static power-on function: Backup state is cleared with
the PF port
• Beep tone: 1.5625 and 3.125 kHz
• Built-in low-pass filter amplifier: This circuit obviates
the need for an external amplifier for the PLL circuit and
contributes to reduced end product costs.
• Built-in DC/DC converter:
Cost reduced in tuner-use power supply circuit
• Memory retention voltage: 0.9 V at least
• V
DD
voltage
— PLL: 1.8 to 3.6 V
— CPU: 1.4 to 3.6 V
— ADC: 1.6 to 3.6 V
• Optional function switches:
— PH0 to PH3/S13 to S16
— PG0 to PG3/S17 to S20
— PG0 to PG3 (open-drain output/general-purpose
output)
— PH0 to PH3 (open-drain output/general-purpose
output)
— FM DC/DC clock (75 kHz or 1/256 times the local
FM oscillator frequency)
— AM DC/DC clock (1/2, 1/4, 1/8, or 1/16 times the
AM local oscillator frequency)
• Package: SQFP-64 (0.5-mm pitch)
Pin Assignment
63
TEST1
62
AOUT
55
HCTR
54
BRES
53
DBR1
52
DBR2
51
DBR3
50
DBR4
58
AMIN
57
FMIN
56
V
DD
59
V
SS
64
XIN
61
AIN
60
EO
49
TU
XOUT
TEST2
PA3
PA2
PA1
PA0
PB3
PB2
PB1
PB0
PC3
PC2
PC1
PC0
PD3
PD2
1
2
3
4
5
6
7
8
9
10
11
General-purpose I/O,
open drain outputs,
segment outputs
General-purpose I/O
General-purpose I/O,
open drain outputs,
segment outputs
General-purpose inputs/
A/D converter inputs
General-purpose unbalanced outputs
Open drain outputs
General-purpose
inputs
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
COM1
COM2
COM3
COM4
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
12
13
Open drain
outputs
14
15
16
General-
purpose
I/O
28
29
30
S15/PH2
17
18
19
20
21
22
23
24
25
26
INT/PD0
PD2
PE1
BEEP/PE0
ADI3/PF2
ADI1/PF1
ADI0/PF0
S20/PG3
S19/PG2
S18/PG1
27
S17/PG0
S16/PH3
S14/PH1
31
S13/PH0
V
SS
No. 7253-2/15
LC723481W/2W/3W
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum supply voltage
Input voltage
Output voltage
Symbol
V
DD
max
V
IN
V
OUT
(1)
V
OUT
(2)
I
OUT
(1)
I
OUT
(2)
Output current
I
OUT
(3)
I
OUT
(4)
I
OUT
(5)
Allowable power dissipation
Operating temperature
Storage temperature
Pdmax
Topr
Tstg
All input pins
AOUT, PE, TU
All output pins except V
OUT
(1)
PC, PD, PG, PH, EO
PB
AOUT, PE, TU
S1 to S20
COM1 to COM4
Ta = –20 to +70°C
Conditions
Ratings
–0.3 to +4.0
–0.3 to V
DD
+0.3
–0.3 to +15
–0.3 to V
DD
+ 0.3
0 to 3
0 to 1
0 to 2
300
3
300
–20 to +70
–45 to +125
Unit
V
V
V
V
mA
mA
mA
µA
mA
mW
°C
°C
Allowable Operating Ranges
at Ta = –20 to +70°C, V
DD
= 1.8 to 3.6 V
Parameter
Symbol
V
DD
(1)
Supply voltage
V
DD
(2)
V
DD
(3)
V
DD
(4)
V
IH
(1)
Input high-level voltage
V
IH
(2)
V
IH
(3)
V
IL
(1)
Input low-level voltage
V
IL
(2)
V
IL
(3)
V
IN
(1)
Input amplitude
V
IN
(2)
V
IN
(3)
V
IN
(4)
Input voltage range
V
IN
(5)
F
IN
(1)
F
IN
(2)
Input frequency
F
IN
(3)
F
IN
(4)
F
IN
(5)
F
IN
(6)
Conditions
PLL operating voltage
Memory retention voltage
CPU operating voltage
A/D converter operating voltage
Input ports other than V
IH
(2), V
IH
(3), AMIN,
FMIN, HCTR, and XIN
BRES port
Port PF
Input ports other than V
IL
(2), V
IL
(3), AMIN,
FMIN, HCTR, and XIN
BRES port
Port PF
XIN
FMIN, AMIN
FMIN
HCTR
ADIO, ADI1, ADI3
XIN: CI
≤
35 kΩ
FMIN: V
IN
(2), V
DD
(1)
FMIN: V
IN
(3), V
DD
(1)
AMIN(H): V
IN
(2), V
DD
(1)
AMIN(L): V
IN
(2), V
DD
(1)
HCTR: V
IN
(4), V
DD
(1)
Ratings
min
1.8
1.0
1.4
1.6
0.7 V
DD
0.8 V
DD
0.6 V
DD
0
0
0
0.5
0.035
0.05
0.035
0
70
10
130
2
0.5
0.4
75
3.0
3.0
3.6
3.6
V
DD
V
DD
V
DD
0.3 V
DD
0.2 V
DD
0.2 V
DD
0.6
0.35
0.35
0.35
V
DD
80
130
250
40
10
12
V
V
V
V
V
V
Vrms
Vrms
Vrms
Vrms
V
kHz
MHz
MHz
MHz
MHz
MHz
typ
3.0
max
3.6
V
Unit
No. 7253-3/15
LC723481W/2W/3W
Electrical Characteristics
within the allowable operating ranges
Parameter
Symbol
I
IH
(1)
I
IH
(2)
Input high-level current
I
IH
(3)
I
IL
(1)
I
IL
(2)
Input low-level current
I
IL
(3)
Input floating voltage
Pull-down resistor values
Hysteresis
Voltage doubler reference voltage
Voltage doubler step-up voltage
V
IF
R
PD
(1)
R
PD
(2)
V
H
DBR4
DBR1, 2, 3
V
OH
(1)
V
OH
(2)
Output high-level voltage
V
OH
(3)
V
OH
(4)
V
OH
(5)
V
OH
(6)
V
OL
(1)
V
OL
(2)
V
OL
(3)
V
OL
(4)
Output low-level voltage
V
OL
(5)
V
OL
(6)
V
OL
(7)
V
OL
(8)
Output off leakage current
A/D converter error
I
DD
(1)
I
DD
(2)
Current drain
I
DD
(3)
I
DD
(4)
I
OFF
(1)
I
OFF
(2)
Conditions
XIN: V
I
= V
DD
= 3.0 V
FMIN, AMIN, HCTR: V
I
= V
DD
= 3.0 V
PA/PF (without pull-down resistors), the PC,
PD, PG, PH, ports,
and BRES: V
I
= V
DD
= 3.0 V
XIN: V
DD
= V
SS
FMIN, AMIN, HCTR: V
I
= V
DD
= V
SS
PA/PF (without pull-down resistors), the PC,
PD, PG, PH, ports,
and BRES: V
I
= V
DD
= V
SS
PA/PF (with pull-down resistors)
PA/PF (with pull-down resistors), V
DD
= 3.0 V
TEST1, TEST2
BRES
Referenced to V
DD
, C(3) = 0.47 µF,
Ta = 25°C
*
1
C(1) = 0.47 µF
C(2) = 0.47 µF, without loading, Ta = 25°C
*
1
PB: I
O
= –1 mA
PC, PD, PG, PH, : I
O
= –1 mA
EO: I
O
= –500 µA
XOUT: I
O
= 200 µA
S1 to S20: I
O
= –20 µA
*
1
COM1, COM2, COM3, COM4:
I
O
= –100 µA
*
1
PB: I
O
= –50 µA
PC, PD, PG, PH, PE: I
O
= –1 mA
EO: I
O
= –500 µA
XOUT: I
O
= –200 µA
S1 to S20: I
O
= –20 µA
*
1
COM1, COM2, COM3, COM4:
I
O
= –100 µA
*
1
PE: I
O
= 2 mA
AOUT (AIN = 1.3 V), TU: I
O
= 1 mA, V
DD
= 3 V
Ports PB, PC, PD, PG, PH and EO
AOUT, PE and port TU
ADI0, ADI1, ADI3, V
DD
(4)
V
DD
(1): F
IN
(2) 130 MHz, Ta = 25°C
V
DD
(2): In HALT mode, Ta = 25°C
*
2
V
DD
= 3.6 V, with the oscillator stopped,
Ta = 25°C
*
3
V
DD
= 1.8 V, with the oscillator stopped,
Ta = 25°C
*
3
–3
–100
–1/2
5
0.1
1
0.5
0.1 V
DD
1.3
2.7
V
DD
–
0.7 V
DD
V
DD
–
0.3 V
DD
V
DD
–
0.3 V
DD
V
DD
–
0.3 V
DD
2.0
2.0
0.3 V
DD
0.7 V
DD
0.3 V
DD
0.3 V
DD
0.3 V
DD
1.0
1.0
1.0
0.5
+3
+100
+1/2
75
100
10
0.2 V
DD
1.5
3.0
1.7
3.3
V
DD
–
0.3 V
DD
–3
–8
3
8
Ratings
min
typ
max
3
20
3
–3
–20
–3
0.05 V
DD
200
Unit
µA
µA
µA
µA
µA
µA
V
kΩ
kΩ
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
nA
LSB
mA
mA
µA
µA
Note: The halt mode current is due to the CPU executing 20 instruction steps every 125 ms.
No. 7253-4/15
LC723481W/2W/3W
Note: * C(1), C(2), and C(3) must be connected even if an LCD is not used.
0.1 to 1
µF
C(C1)
0.1 to 1
µF
0.1 to 1
µF
C(C3)
C(C2)
DBR1
DBR2
DBR3
DBR4
Notes: *1. The capacitors C(1), C(2), and C(3) must be connected to the DBR pins.
*2. Halt mode current measurement circuit
7 pF
75 kHz
XOUT VDD BRESDBR1
XIN
DBR2
DBR3
FMIN
AMIN
HCTR
TEST1, 2
DBR4
VSS
PA, PF
AIN
*3. Backup mode current measurement circuit
7 pF
75 kHz
0.1
µF
0.1
µF
0.1
µF
FMIN
AMIN
HCTR
TEST1, 2
XOUT VDD BRES DBR1
XIN
DBR2
DBR3
DBR4
VSS
AIN
A
A
0.1
µF
0.1
µF
0.1
µF
7pF
7pF
With all ports other than those specified above left open.
With output mode selected for PC and PD.
With segments S13 to S20 selected.
With all ports other than those specified above left open.
With output mode selected for PC and PD.
With segments S13 to S20 selected.
No. 7253-5/15