21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16721
3.3V 20-Bit Flip-Flop
with 3-STATE Outputs
Product Features
•
•
•
•
•
•
•
•
PI74ALVCH16721 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at 40°C to +85°C
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced in the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16721 is a 20-bit flip-flop with 3-state outputs
designed specifically for 2.3V to 3.6V V
CC
operation. The
PI74ALVCH16721 is designed with edge-triggered D-type flip-
flops with qualified clock storage. On the positive transition of
clock (CLK) input, the device provides true data at the Q outputs,
provided that the clock-enable (CLKEN) input is LOW. If CLKEN
is HIGH, no data is stored.
A buffered output-enable (OE) input can be used to place the
20 outputs in either a normal logic state (HIGH or LOW level) or
a high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly. The high-impedance
state and increased drive provide the capacity to drive bus lines
without the need for interface or pullup components. OE does not
affect the internal operation of the flip-flops. Old data can be
retained or new data can be entered while the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The PI74ALVCH16721 data has Bus Hold which retains the
data inputs last state whenever the data input goes to high-
impedance preventing floating inputs and eliminating the need
for pullup/down resistors.
Logic Block Diagram
1
56
29
2
55
1
PS8090C 02/07/00
Product Pin Description
Pin Name
OE
CLKEN
CLK
Dx
Qx
GND
V
CC
Description
Output Enable Input (Active LOW)
Clock Enable Input (Active LOW)
Clock Input (Active HIGH)
Data Inputs
3-State Outputs
Ground
Power
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16721
3.3V 20-Bit Flip-Flop with 3-State Outputs
Truth Table
(1)
Inputs
OE
L
L
L
L
H
CLKEN
H
L
L
L
X
CLK
X
↑
↑
L or H
X
Dx
X
H
L
X
X
Outputs
Qx
Q
0
H
L
Q
0
Z
Product Pin Configuration
OE
Q1
Q2
GND
Q3
Q4
VCC
Q5
Q6
Q7
GND
Q8
Q9
Q10
Q11
Q12
Q13
GND
Q14
Q15
Q16
VCC
Q17
Q18
GND
Q19
Q20
NC
Notes:
1. H = High Signal Level
L = Low Signal Level
X = Don't Care or Irrelevant
Z = High Impedance
↑ =
LOW-to-HIGH Transition
CLK
D1
D2
GND
D3
D4
VCC
D5
D6
D7
GND
D8
D9
D10
D11
D12
D13
GND
D14
D15
D16
VCC
D17
D18
GND
D19
D20
CLKEN
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
56-Pin
15
A,V
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
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PS8090C 02/07/00
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PI74ALVCH16721
3.3V 20-Bit Flip-Flop with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................................... 65°C to +150°C
Ambient Temperature with Power Applied ........................ 40°C to +85°C
Input Voltage Range, V
IN ......................................................
0.5V to V
CC
+0.5V
Output Voltage Range, V
OUT ...............................................
0.5V to V
CC
+0.5V
DC Input Voltage .................................................................... 0.5V to +5.0V
DC Output Current ............................................................................ 100 mA
Power Dissipation .................................................................................. 1.0W
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40°C to +85°C, V
CC
= 3.3V ±10%)
Parame te rs
V
CC
V
IH(3)
V
IL(3)
V
IN(3)
V
OUT(3)
D e s cription
Supply Voltage
Input HIGH Voltage
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
0
0
I
OH
= - 100
µ
A, V
CC
= Min. to Max.
O utput
HIGH
Voltage
V
IH
= 1.7V, I
OH
= - 6mA, V
CC
= 2.3V
V
IH
= 1.7V, I
OH
= - 12mA, V
CC
= 2.3V
V
IH
= 2.0V, I
OH
= - 12mA, V
CC
= 2.7V
V
IH
= 2.0V, I
OH
= - 12mA, V
CC
= 3.0V
V
IH
= 2.0V, I
OH
= - 24mA, V
CC
= 3.0V
I
OL
= 100
µ
A, V
IL
= Min. to Max.
V
OL
O utput
LO W
Voltage
V
IL
= 0.7V, I
OL
= 6mA, V
CC
= 2.3V
V
IL
= 0.7V, I
OL
= 12mA, V
CC
= 2.3V
V
IL
= 0.8V, I
OL
= 12mA, V
CC
= 2.7V
V
IL
= 0.8V, I
OL
= 24mA, V
CC
= 3.0V
O utput
HIGH
Current
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
3
Te s t Conditions
(1)
M in.
2.3
1.7
2.0
Typ.
(2)
M ax.
3.6
Units
Input LO W Voltage
Input Voltage
O utput Voltage
0.7
0.8
V
CC
V
CC
V
CC
- 0.2
2.0
1.7
2.2
2.4
2.0
0.2
0.4
0.7
0.4
0.55
- 12
- 12
- 24
12
12
24
PS8090C 02/07/00
V
V
OH
I
OH(3)
mA
I
OL(3)
O utput
LO W
Current
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16721
3.3V 20-Bit Flip-Flop with 3-State Outputs
DC Electrical Characteristics-
Continued
(Over the Operating Range, T
A
= 40°C to +85°C, V
CC
= 3.3V ±10%)
Parame te rs De s cription
I
IN
Input Current
Te s t Conditions
(1)
V
IN
= V
CC
or GND, V
CC
= 3.6V
V
IN
= 0.7V, V
CC
= 2.3V
I
IN
(
HOLD
)
Input
Hold
Current
V
IN
= 1.7V, V
CC
= 2.3V
V
IN
= 0.8V, V
CC
= 3.0V
V
IN
= 2.0V, V
CC
= 3.0V
V
IN
= 0 to 3.6V, V
CC
= 3.6V
I
OZ
I
CC
∆I
CC
Output Current (3- STATE Outputs)
Supply Current
Supply Current per Input
@ TTL HIGH
Control Inputs
Data Inputs
Outputs
V
OUT
= V
CC
or GND, V
CC
= 3.6V
V
CC
= 3.6V, I
OUT
= 0
µ
A,
V
IN
= GND or V
CC
V
CC
= 3.0V to 3.6V
One Input at V
CC
- 0.6V
Other Inputs at V
CC
or GND
V
IN
= V
CC
or GND, V
CC
= 3.3V
V
O
= V
CC
or GND, V
CC
= 3.3V
3
6
7
pF
45
- 45
75
- 75
±500
±10
40
750
µA
M in.
Typ.
(2)
M ax.
±5
Units
C
I
C
O
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
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PS8090C 02/07/00
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16721
3.3V 20-Bit Flip-Flop with 3-State Outputs
Switching Characteristics over Operating Range
(1)
Parame te rs
f
CLOCK
f
MAX
t
PLH
, t
PHL
t
PZH
, t
PZL
t
PHX
t
SU
t
SU
t
H
t
H
t
W
∆
t/
∆v
(4)
De s cription
Clock Frequency
Maximum Frequency
Propogation Delay
CLK to Qx
Output Enable Time
OE to Qx
Output Disable Time
OE to Qx
Data Before CLK
↑
CLKEN Before CLK
↑
Data After CLK
↑
CLKEN After CLK
↑
Pulse Width
(3)
CLK HIGH or LOW
Input Transition RISE or FALL
C
L
= 50pF
R
L
= 500
Ω
4
3.4
0
0
3.3
0
10
1.0
Conditions
(1)
V
CC
= 2.5V ±0.2V
M in.
(2)
0
150
5.6
6.1
5.5
3.6
3.1
0
0
3.3
0
10
1.0
M ax.
150
V
CC
= 2.7V
M in.
(2)
0
150
5.1
5.8
4.7
3.1
2.7
0
0
3.3
0
10
ns/V
1.0
M ax.
150
V
CC
= 3.3V ±0.3V
M in.
(2)
0
150
4.3
4.8
4.4
M ax.
150
Units
MHz
ns
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Recommended operating condition.
Operating Characteristics, T
A
= 25ºC
Parame te r
C
PD
Power Dissipation
Capacitance
Outputs Enabled
Outputs Disabled
Te s t Conditions
V
CC
= 2.5V ±0.2V
Typ.
55
46
59
49
V
CC
= 3.3V ±0.3V
Units
C
L
= 50pF, f = 10 MHz
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5
PS8090C 02/07/00
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