* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/
_
C from 65
_
to 125
_
C
SOIC Package: – 7 mW/
_
C from 65
_
to 125
_
C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
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MAXIMUM RATINGS*
MOTOROLA
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
RECOMMENDED OPERATING CONDITIONS
MC74HC42
Symbol
Vin, Vout
Symbol
Symbol
VCC
Vout
Tstg
ICC
Iout
VCC
Vin
PD
TL
VOH
tr, tf
Iin
VOL
ICC
TA
VIH
VIL
Iin
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Storage Temperature
Power Dissipation in Still Air
DC Supply Current, VCC and GND Pins
DC Output Current, per Pin
DC Input Current, per Pin
DC Output Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Supply Voltage (Referenced to GND)
Input Rise and Fall Time
(Figure 1)
Operating Temperature, All Package Types
DC Input Voltage, Output Voltage (Referenced to GND)
DC Supply Voltage (Referenced to GND)
Maximum Quiescent Supply
Current (per Package)
Maximum Input Leakage Current
Maximum Low–Level Output
Voltage
Minimum High–Level Output
Voltage
Maximum Low–Level Input
Voltage
Minimum High–Level Input
Voltage
Parameter
Parameter
Parameter
Plastic DIP†
SOIC Package†
Vin = VIH or VIL
|Iout|
20
µA
Vin = VIH or VIL
|Iout|
20
µA
Vin = VCC or GND
Iout = 0
µA
Vin = VCC or GND
Vin = VIH or VIL |Iout|
|Iout|
Vin = VIH or VIL |Iout|
|Iout|
Vout = 0.1 V or VCC – 0.1 V
|Iout|
20
µA
Vout = 0.1 V or VCC – 0.1 V
|Iout|
20
µA
v
v
v
v
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Test Conditions
– 0.5 to VCC + 0.5
– 1.5 to VCC + 1.5
– 65 to + 150
– 0.5 to + 7.0
2
– 55
Min
2.0
Value
v
4.0 mA
v
5.2 mA
v
4.0 mA
v
5.2 mA
0
0
0
0
±
50
±
25
±
20
260
750
500
+ 125
1000
500
400
VCC
Max
6.0
VCC
V
6.0
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Unit
Unit
mW
mA
mA
mA
_
C
_
C
_
C
ns
V
V
V
V
V
– 55 to
25
_
C
±
0.1
1.5
3.15
4.2
0.26
0.26
3.98
5.48
0.1
0.1
0.1
1.9
4.4
5.9
0.3
0.9
1.2
8
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout) VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Guaranteed Limit
v
85
_
C
v
125
_
C
High–Speed CMOS Logic Data
DL129 — Rev 6
±
1.0
1.5
3.15
4.2
0.33
0.33
3.84
5.34
0.1
0.1
0.1
1.9
4.4
5.9
0.3
0.9
1.2
80
v
±
1.0
1.5
3.15
4.2
0.40
0.40
3.70
5.20
0.1
0.1
0.1
1.9
4.4
5.9
0.3
0.9
1.2
160
v
Unit
µA
µA
V
V
V
V
MC74HC42
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AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
Guaranteed Limit
Symbol
tPLH,
tPHL
tTLH,
tTHL
Cin
Parameter
VCC
V
2.0
4.5
6.0
2.0
4.5
6.0
—
– 55 to
25
_
C
150
30
26
75
15
13
10
v
85
_
C
v
125
_
C
190
38
33
95
19
16
10
225
45
38
110
22
19
10
Unit
ns
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 2)
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
Maximum Input Capacitance
ns
pF
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD
Power Dissipation Capacitance (Per Package)*
65
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC 2 f + ICC VCC . For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
TEST POINT
tr
INPUT A
90%
50%
10%
tPHL
90%
50%
10%
tTHL
tf
VCC
GND
tPLH
DEVICE
UNDER
TEST
OUTPUT
CL*
OUTPUT Y
tTLH
* Includes all probe and jig capacitance
Figure 1. Switching Waveforms
Figure 2. Test Circuit
FUNCTION TABLE
Inputs
A3
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
A2
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
A1
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Y0
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Y1
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Y2
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
Y3
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
Outputs
Y4
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
Y5
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
Y6
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
Y7
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
Y8
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
Y9
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
MC74HC42
PIN DESCRIPTIONS
INPUTS
A0, A1, A2, A3, (Pins 15, 14, 13, 12)
BCD Address Inputs. The BCD address present at these
inputs determines which output is active–low. These inputs
are arranged such that A3 is the most–significant bit and A0
is the least significant bit. Addresses with a hexadecimal
equivalent number greater than nine are not decoded
OUTPUTS
Y0 – Y9 (Pins 1 – 7, 9 – 11)
Active–Low Decoded Outputs. These outputs assume a
low level when addressed and remain high when not ad-
dressed.
EXPANDED LOGIC DIAGRAM
1
Y0
2
Y1
A0
15
3
Y2
4
Y3
5
A1
14
Y4
6
Y5
7
A2
13
9
Y6
Y7
10
A3
12
11
Y8
Y9
MOTOROLA
4
High–Speed CMOS Logic Data
DL129 — Rev 6
MC74HC42
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
B
1
8
–A
–
16
9
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MILLIMETERS
MIN
MAX
MIN
MAX
0.740 0.770 18.80 19.55
6.35
0.250 0.270
6.85
3.69
0.145 0.175
4.44
0.39
0.015 0.021
0.53
1.02
0.040 0.070
1.77
0.100 BSC
2.54 BSC
0.050 BSC
1.27 BSC
0.21
0.008 0.015
0.38
2.80
0.110 0.130
3.30
7.50
0.295 0.305
7.74
0°
0°
10°
10°
0.020 0.040
0.51
1.01
F
S
C
L
–T
–
H
G
D
16 PL
0.25 (0.010)
M
SEATING
PLANE
K
J
T A
M
M
–A
–
16
9
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–B
–
1
8
P
8 PL
0.25 (0.010)
M
B
M
G
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80 10.00
4.00
3.80
1.75
1.35
0.49
0.35
1.25
0.40
1.27 BSC
0.25
0.19
0.25
0.10
7°
0°
6.20
5.80
0.50
0.25
INCHES
MIN
MAX
0.386 0.393
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
7°
0°
0.229 0.244
0.010 0.019
K
C
–T
SEATING
–
PLANE
R
X 45°
M
D
16 PL
0.25 (0.010)
M
J
T
B
S
A
S
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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