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ZL30406QGG1

Description
ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64
CategoryWireless rf/communication    Telecom circuit   
File Size237KB,21 Pages
ManufacturerZarlink Semiconductor (Microsemi)
Websitehttp://www.zarlink.com/
Environmental Compliance
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ZL30406QGG1 Overview

ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64

ZL30406QGG1 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerZarlink Semiconductor (Microsemi)
package instructionHTFQFP,
Reach Compliance Codecompliant
appSONET;SDH
JESD-30 codeS-PQFP-G64
JESD-609 codee3
length10 mm
Humidity sensitivity level3
Number of functions1
Number of terminals64
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHTFQFP
Package shapeSQUARE
Package formFLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.2 mm
Nominal supply voltage3.3 V
surface mountYES
Telecom integrated circuit typesATM/SONET/SDH SUPPORT CIRCUIT
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width10 mm
Base Number Matches1
ZL30406
SONET/SDH Clock Multiplier PLL
Data Sheet
Features
Meets jitter requirements of Telcordia GR-253-
CORE for OC-48, OC-12, and OC-3 rates
Meets jitter requirements of ITU-T G.813 for STM-
16, STM-4 and STM-1 rates
Provides four LVPECL differential output clocks at
77.76 MHz
Provides a CML differential clock programmable
to 19.44 MHz, 38.88 MHz, 77.76 MHz and
155.52 MHz
Provides a single-ended CMOS clock at
19.44 MHz
Provides enable/disable control of output clocks
Accepts a CMOS reference at 19.44 MHz
3.3 V supply
ZL30406QGC
ZL30406QGG1
March 2006
Ordering Information
64 Pin TQFP
Trays
64 Pin TQFP* Trays, Bake & Drypack
*Pb Free Matte Tin
-40°C to +85°C
Description
The ZL30406 is an analog phase-locked loop (APLL)
designed to provide rate conversion and jitter
attenuation for SDH (Synchronous Digital Hierarchy)
and SONET (Synchronous Optical Network)
networking equipment. The ZL30406 generates very
low jitter clocks that meet the jitter requirements of
Telcordia GR-253-CORE OC-48, OC-12, OC-3, OC-1
rates and ITU-T G.813 STM-16, STM-4 and STM-1
rates.
The ZL30406 accepts a CMOS compatible reference
at 19.44 MHz and generates four LVPECL differential
output clocks at 77.76 MHz, a CML differential
clock programmable to 19.44 MHz, 38.88 MHz,
77.76 MHz and 155.52 MHz and a single-ended
CMOS clock at 19.44 MHz. The output clocks can
be individually enabled or disabled.
Applications
SONET/SDH line cards
Network Element timing cards
LPF
C77oEN-A
C77oEN-B
OC-CLKoEN
C77o
,
C155o
C19o, C38o,
CML-P/N outputs
OC-CLKoP/N
C19i
Frequency
& Phase
Detector
19.44MHz
C77oP/N-D
BIAS
Reference &
Bias circuit
Loop
Filter
Output
VCO
C77oP/N-A
C77oP/N-B
C77oP/N-C
Interface
Circuit
C19o
VDD GND
VCC
FS1-2
C19oEN
C77oEN-C
C77oEN-D
15
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved.

ZL30406QGG1 Related Products

ZL30406QGG1 ZL30406 ZL30406QGC ZL30406_06 ZL30407 MT9046 MT90401
Description ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64
Number of functions 1 1 1 1 1 1 1
Number of terminals 64 64 64 64 64 64 64
Maximum operating temperature 85 °C 85 Cel 85 °C 85 Cel 85 Cel 85 Cel 85 Cel
Minimum operating temperature -40 °C -40 Cel -40 °C -40 Cel -40 Cel -40 Cel -40 Cel
surface mount YES Yes YES Yes Yes Yes Yes
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal location QUAD QUAD QUAD QUAD QUAD QUAD QUAD
Rated supply voltage - 3.3 V - 3.3 V 3.3 V 3.3 V 3.3 V
Processing package description - 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64 - 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64
Lead-free - Yes - Yes Yes Yes Yes
EU RoHS regulations - Yes - Yes Yes Yes Yes
state - ACTIVE - ACTIVE ACTIVE ACTIVE ACTIVE
packaging shape - SQUARE - SQUARE SQUARE SQUARE SQUARE
Package Size - FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH - FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
Terminal spacing - 0.5000 mm - 0.5000 mm 0.5000 mm 0.5000 mm 0.5000 mm
terminal coating - MATTE TIN - MATTE TIN MATTE TIN MATTE TIN MATTE TIN
Packaging Materials - PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Synchronous digital series applications - SDH Applicati - SDH Applicati SDH Applicati SDH Application SDH Application
sonnet application - SONET Applicati - SONET Applicati SONET Applicati SONET Application SONET Application
Communication type - SUPPORT CIRCUIT - SUPPORT CIRCUIT SUPPORT CIRCUIT SUPPORT CIRCUIT SUPPORT CIRCUIT
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