NE570
Compandor
The NE570 is a versatile low cost dual gain control circuit in which
either channel may be used as a dynamic range compressor or
expandor. Each channel has a full−wave rectifier to detect the average
value of the signal, a linerarized temperature−compensated variable
gain cell, and an operational amplifier.
The NE570 is well suited for use in cellular radio and radio
communications systems, modems, telephone, and satellite
broadcast/receive audio systems.
Features
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MARKING
DIAGRAM
16
•
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•
•
•
•
•
•
•
•
•
•
•
•
Complete Compressor and Expandor in One IC
Temperature Compensated
Greater than 110 dB Dynamic Range
Operates Down to 6.0 V
DC
System Levels Adjustable with External Components
Distortion may be Trimmed Out
Pb−Free Packages are Available*
Cellular Radio
Telephone Trunk Comandor
High Level Limiter
Low Level Expandor − Noise Gate
Dynamic Noise Reduction Systems
Voltage−Controlled Amplifier
Dynamic Filters
Rating
Symbol
V
CC
T
A
T
J
P
D
R
qJA
Value
24
0 to +70
150
400
105
Unit
V
DC
°C
°C
mW
°C/W
1
SOIC−16 WB
D SUFFIX
CASE 751G
NE570D
AWLYYWWG
1
Plastic Small Outline Package;
16 Leads; Body Width 7.5 mm
Applications
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
RECT_CAP_1
RECT_IN_1
DG_CELL_IN_1
GND
INV_IN_1
RES_R3_1
OUTPUT_1
THD_TRIM_1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
MAXIMUM RATINGS
Maximum Operating Voltage
Operating Ambient Temperature Range
Operating Junction Temperature
Power Dissipation
Thermal Resistance, Junction−to−Ambient
RECT_CAP_2
RECT_IN_2
DG_CELL_IN_2
V
CC
INV_IN_2
RES_R3_2
OUTPUT_2
THD_TRIM_2
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THD TRIM
R
2
20 kW
R
3
R
3
20 kW
V
REF
R
4
30 kW 1.8 V
RECTIFIER
INVERTER IN
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
DG
CELL IN
VARIABLE
GAIN
−
OUTPUT
+
RECT IN
R
1
10 kW
RECT CAP
Figure 1. Block Diagram
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
May, 2006 − Rev. 4
Publication Order Number:
NE570/D
NE570
PIN FUNCTION DESCRIPTION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
RECT CAP 1
RECT IN 1
DG
CELL IN 1
GND
INV. IN 1
RES. R3 1
OUTPUT 1
THD TRIM 1
THD TRIM 2
OUTPUT 2
RES. R3 2
INV. IN 2
V
CC
DG
CELL IN 2
RECT IN 2
RECT CAP 2
Description
External Capacitor Pinout for Rectifier 1
Rectifier 1 Input
Variable Gain Cell 1 Input
Ground
Inverted Input 1
R3 Pinout 1
Output 1
Total Harmonic Distortion Trim 1
Total Harmonic Distortion Trim 2
Output 2
R3 Pinout 2
Inverted Input 2
Positive Power Supply
Variable Gain Cell 2 Input
Rectifier 2 Input
External Capacitor Pinout for Rectifier 2
ELECTRICAL CHARACTERISTICS
V
CC
= +15 V, T
A
= 25
°C;
unless otherwise stated.
Characteristic
Supply Voltage
Supply Current
Output Current Capability
Output Slew Rate
Gain Cell Distortion (Note 1)
Untrimmed
Trimmed
Resistor Tolerance
Internal Reference Voltage
Output DC Shift (Note 2)
Expandor Output Noise
Unity Gain Level (Note 4)
Gain Change (Notes 1 and 5)
Reference Drift (Note 5)
Resistor Drift (Note 5)
Tracking Error (measured relative to value at unity gain)
equals [V
O
− V
O
(unity gain)] dB − V
2
dBm
Channel Separation
1.
2.
3.
4.
5.
Measured at 0 dBm, 1.0 kHz.
Expandor AC input change from no signal to 0 dBm.
Input to V
1
and V
2
grounded.
0 dB = 775 mV
RMS
.
Relative to value at T
A
= 25°C.
T
A
= 0°C to +70°C
T
A
= 0°C to +70°C
T
A
= 0°C to +70°C
Rectifier Input V
CC
= +6.0 V
V
2
= +6.0 dBm, V
1
= 0 dB
V
2
= −30 dBm, V
1
= 0 dB
Untrimmed
No signal, 15 Hz to 20 kHz
(Note 3)
No Signal
Test Conditions
Symbol
V
CC
I
CC
I
OUT
SR
Min
6.0
−
±20
−
−
−
−
1.7
−
−
−1.0
−
−
−
−
−
−
Typ
−
4.3
−
±0.5
0.3
0.05
±5
1.8
±90
20
0
±0.1
±5.0
+8.0, −5.0
±0.2
+0.2
60
Max
24
4.8
−
−
1.0
−
±15
1.9
±150
45
+1.0
±0.2
±10
−
−
−0.5, +1.0
−
Unit
V
mA
mA
V/ms
%
%
%
V
mV
mV
dBm
dB
mV
%
dB
dB
dB
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2
NE570
CIRCUIT DESCRIPTION
The NE570 compandor building blocks, as shown in the
block diagram, are a full−wave rectifier, a variable gain cell,
an operational amplifier and a bias system. The arrangement
of these blocks in the IC result in a circuit which can perform
well with few external components, yet can be adapted to
many diverse applications.
The full−wave rectifier rectifies the input current which
flows from the rectifier input, to an internal summing node
which is biased at V
REF
. The rectified current is averaged on
an external filter capacitor tied to the C
RECT
terminal, and
the average value of the input current controls the gain of the
variable gain cell. The gain will thus be proportional to the
average value of the input signal for capacitively−coupled
voltage inputs as shown in the following equation. Note that
for capacitively−coupled inputs there is no offset voltage
capable of producing a gain error. The only error will come
from the bias current of the rectifier (supplied internally)
which is less than 0.1
mA.
G
T
|V
IN
*
V
REF
| avg
R
1
G
T
| V
IN
| avg
R
1
COMPRESSOR INPUT LEVEL OR EXPANDOR OUTPUT LEVEL (dBm)
3
or
distortion. The only distortion which remains is even
harmonics, and they exist only because of internal offset
voltages. The THD trim terminal provides a means for
nulling the internal offsets for low distortion operation.
The operational amplifier (which is internally
compensated) has the non−inverting input tied to V
REF
, and
the inverting input connected to the
DG
cell output as well
as brought out externally. A resistor, R
3
, is brought out from
the summing node and allows compressor or expander gain
to be determined only by internal components.
The output stage is capable of
±20
mA output current.
This allows a +13 dBm (3.5 V
RMS
) output into a 300
W
load
which, with a series resistor and proper transformer, can
result in +13 dBm with a 600
W
output impedance.
A bandgap reference provides the reference voltage for all
summing nodes, a regulated supply voltage for the rectifier
and
DG
cell, and a bias current for the
DG
cell. The low
tempco of this type of reference provides very stable biasing
over a wide temperature range.
The typical performance characteristics illustration
shows the basic input−output transfer curve for basic
compressor or expander circuits.
The speed with which gain changes to follow changes in
input signal levels is determined by the rectifier filter
capacitor. A small capacitor will yield rapid response but
will not fully filter low frequency signals. Any ripple on the
gain control signal will modulate the signal passing through
the variable gain cell. In an expander or compressor
application, this would lead to third harmonic distortion, so
there is a trade−off to be made between fast attack and decay
times and distortion. For step changes in amplitude, the
change in gain with time is shown by this equation.
G(t)
+
(G
initial
*
G
final
) e
t
+
10kW
C
RECT
*t
t
+20
+10
0
−10
−20
−30
−40
−50
−60
−70
−80
−40 −30 −20 −10
0 +10
COMPRESSOR OUTPUT LEVEL
OR
EXPANDOR INPUT LEVEL (dBm)
)
G
final
The variable gain cell is a current−in, current−out device
with the ratio I
OUT
/I
IN
controlled by the rectifier. I
IN
is the
current which flows from the
DG
input to an internal
summing node biased at V
REF
. The following equation
applies for capacitively−coupled inputs. The output current,
I
OUT
, is fed to the summing node of the op amp.
I
IN
+
V
IN
*
V
REF
V
+
IN
R
2
R
2
Figure 2. Basic Input−Output Transfer Curve
A compensation scheme built into the
DG
cell
compensates for temperature and cancels out odd harmonic
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NE570
V
CC
= 15 V
0.1
mF
13
10
mF
6, 11
20 kW
V
1
3, 14
2.2
mF
20 kW
DG
−
+
7, 10
V
O
V
REF
2, 15
V
2
2.2
mF
4
1, 16
2.2
mF
5, 12
8.2 kW
8, 9
200 pF
10 kW
30 kW
Figure 3. Typical Test Circuit
INTRODUCTION
Much interest has been expressed in high performance
electronic gain control circuits. For non−critical applications,
an integrated circuit operational transconductance amplifier
can be used, but when high−performance is required, one has
to resort to complex discrete circuitry with many expensive,
well−matched components. This paper describes an
inexpensive integrated circuit, the NE570 Compandor, which
offers a pair of high performance gain control circuits
featuring low distortion (<0.1 %), high signal−to−noise ratio
(90 dB), and wide dynamic range (110 dB).
CIRCUIT BACKGROUND
The NE570 Compandor was originally designed to satisfy
the requirements of the telephone system. When several
telephone channels are multiplexed onto a common line, the
resulting signal−to−noise ratio is poor and companding is
used to allow a wider dynamic range to be passed through the
channel. Figure 4 graphically shows what a compandor can
do for the signal−to−noise ratio of a restricted dynamic range
channel. The input level range of +20 dB to −80 dB is shown
undergoing a 2−to−1 compression where a 2.0 dB input level
change is compressed into a 1.0 dB output level change by the
compressor. The original 100 dB of dynamic range is thus
compressed to a 50 dB range for transmission through a
restricted dynamic range channel. A complementary
expansion on the receiving end restores the original signal
levels and reduces the channel noise by as much as 45 dB.
The significant circuits in a compressor or expander are
the rectifier and the gain control element. The phone system
requires a simple full−wave averaging rectifier with good
accuracy, since the rectifier accuracy determines the (input)
output level tracking accuracy. The gain cell determines the
distortion and noise characteristics, and the phone system
specifications here are very loose. These specs could have
been met with a simple operational transconductance
multiplier, or OTA, but the gain of an OTA is proportional
to temperature and this is very undesirable. Therefore, a
linearized transconductance multiplier was designed which
is insensitive to temperature and offers low noise and low
distortion performance. These features make the circuit
useful in audio and data systems as well as in
telecommunications systems.
COMPRESSION
EXPANSION
NOISE
−80
−80
INPUT
LEVEL
+20
0 dB
OUTPUT
LEVEL
−20
0 dB
−40
−40
Figure 4. Restricted Dynamic Range Channel
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NE570
BASIC CIRCUIT HOOK−UP AND OPERATION
Figure 5 shows the block diagram of one half of the chip,
(there are two identical channels on the IC). The full−wave
averaging rectifier provides a gain control current, I
G
, for the
variable gain (DG) cell. The output of the
DG
cell is a current
which is fed to the summing node of the operational
amplifier. Resistors are provided to establish circuit gain and
set the output DC bias.
THD_TRIM R3
8, 9
R
2
20 kW
DG
I
G
R
4
30 kW
V
REF
1.8 V
6, 11
R
3
20 kW
INV. IN
5, 12
Figure 7 shows the hook−up for a compressor. This is
essentially an expander placed in the feedback loop of the op
amp. The
DG
cell is set−up to provide AC feedback only, so
a separate DC feedback loop is provided by the two R
DC
and
C
DC
. The values of R
DC
will determine the DC bias at the
output of the op amp. The output will bias to:
V
OUT
DC
+
1
)
R
DC1
)
R
DC2
R
4
R
DC TOT
1.8 V
30 kW
V
REF
V
OUT
DC
+
1
)
DG_CELL_IN
3, 14
−
+
The output of the expander will bias up to:
7, 10
OUTPUT
V
CC
: PIN 13
GND: PIN 4
R
1
10 kW
RECT_IN
2, 15
V
OUT
DC
+
V
OUT
DC
+
1
)
R
3
V
REF
R
4
1, 16
C
RECT
1
)
20 kW 1.8 V
+
3.0 V
30 kW
Figure 5. Chip Block Diagram (1 of 2 Channels)
The circuit is intended for use in single power supply
systems, so the internal summing nodes must be biased at
some voltage above ground. An internal band gap voltage
reference provides a very stable, low noise 1.8 V reference
denoted V
REF
. The non−inverting input of the op amp is tied
to V
REF
, and the summing nodes of the rectifier and
DG
cell
(located at the right of R
1
and R
2
) have the same potential.
The THD_TRIM pin is also at the V
REF
potential.
Figure 6 shows how the circuit is hooked up to realize an
expander. The input signal, V
IN
, is applied to the inputs of
both the rectifier and the
DG
cell. When the input signal
drops by 6.0 dB, the gain control current will drop by a factor
of 2, and so the gain will drop 6 dB. The output level at V
OUT
will thus drop 12 dB, giving us the desired 2−to−1
expansion.
R
3
*C
IN1
R
2
DG
V
IN
*C
IN2
R
1
R
4
V
REF
−
+
V
OUT
The output will bias to 3.0 V when the internal resistors
are used. External resistors may be placed in series with R3,
(which will affect the gain), or in parallel with R4 to raise the
DC bias to any desired value.
R
2
DG
R
1
*R
DC
*C
RECT
*R
DC
*C
DC
*C
F
*C
IN
V
IN
R
3
−
R
4
V
REF
+
V
OUT
NOTES:
GAIN =
1
R1 R2 IB
2 R3 VIN(avg.) 2
I
B
= 140
mA
* EXTERNAL COMPONENTS
Figure 7. Basic Compressor
*C
RECT
NOTES:
GAIN =
2 R
3
V
IN
(Avg.)
R
1
R
2
I
B
2
I
B
= 140
mA
* EXTERNAL COMPONENTS
Figure 6. Basic Expander
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