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SY100E107

Description
QUINT 2-INPUT XOR/XNOR GATE
File Size59KB,4 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Compare View All

SY100E107 Overview

QUINT 2-INPUT XOR/XNOR GATE

Micrel, Inc.
QUINT 2-INPUT
XOR/XNOR GATE
SY10E107
SY100E107
SY10E107
SY100E107
FEATURES
s
s
s
s
600ps max. propagation delay
Extended 100E V
EE
range of –4.2V to –5.5V
True and complementary outputs
OR/NOR function outputs
DESCRIPTION
The SY10/100E107 offer five 2-input XOR/XNOR gates
and are designed for use in new, high- performance ECL
systems.
The E107 also features a function output, F, which is the
OR of all five XOR gate outputs, while F is the NOR. Both
true and complementary outputs are provided.
s
Fully compatible with Industry standard 10KH,
100K I/O levels
s
Internal 75K
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E107
s
Available in 28-pin PLCC package
BLOCK DIAGRAM
F
F
D
0a
D
0b
D
1a
D
1b
D
2a
D
2b
D
3a
D
3b
D
4a
D
4b
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
PIN NAMES
Pin
D
na
, D
nb
Q
0
-Q
4
Q
0
-Q
4
F
F
V
CCO
Data Inputs
XOR Outputs
XNOR Outputs
OR Output
NOR Output
V
CC
to Output
Function
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
Rev.: F
Amendment: /0
1
Issue Date: March 2006

SY100E107 Related Products

SY100E107 SY10E107 SY10E107JC SY10E107_06 SY10E107JZTR SY10E107JCTR SY100E107JZTR SY100E107JCTR SY100E107JC
Description QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE QUINT 2-INPUT XOR/XNOR GATE
Is it Rohs certified? - - incompatible - conform to incompatible conform to incompatible incompatible
Maker - - Microchip - Microchip Microchip - Microchip Microchip
package instruction - - PLASTIC, LCC-28 - QCCJ, PLASTIC, LCC-28 QCCJ, PLASTIC, LCC-28 PLASTIC, LCC-28
Reach Compliance Code - - _compli - compli _compli compli _compli _compli
series - - 10E - 10E 10E 100E 100E 100E
JESD-30 code - - S-PQCC-J28 - S-PQCC-J28 S-PQCC-J28 S-PQCC-J28 S-PQCC-J28 S-PQCC-J28
JESD-609 code - - e0 - e3 e0 e3 e0 e0
Logic integrated circuit type - - XOR/XNOR GATE - XOR/XNOR GATE XOR/XNOR GATE XOR/XNOR GATE XOR/XNOR GATE XOR/XNOR GATE
Number of functions - - 5 - 5 5 5 5 5
Number of entries - - 2 - 2 2 2 2 2
Number of terminals - - 28 - 28 28 28 28 28
Maximum operating temperature - - 85 °C - 85 °C 85 °C 85 °C 85 °C 85 °C
Output characteristics - - OPEN-EMITTER - OPEN-EMITTER OPEN-EMITTER OPEN-EMITTER OPEN-EMITTER OPEN-EMITTER
Package body material - - PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - QCCJ - QCCJ QCCJ QCCJ QCCJ QCCJ
Package shape - - SQUARE - SQUARE SQUARE SQUARE SQUARE SQUARE
Package form - - CHIP CARRIER - CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER
propagation delay (tpd) - - 0.6 ns - 0.6 ns 0.6 ns 0.6 ns 0.6 ns 0.6 ns
Certification status - - Not Qualified - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
surface mount - - YES - YES YES YES YES YES
technology - - ECL - ECL ECL ECL ECL ECL
Temperature level - - OTHER - COMMERCIAL EXTENDED OTHER COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal surface - - Tin/Lead (Sn/Pb) - Matte Tin (Sn) Tin/Lead (Sn/Pb) Matte Tin (Sn) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form - - J BEND - J BEND J BEND J BEND J BEND J BEND
Terminal pitch - - 1.27 mm - 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location - - QUAD - QUAD QUAD QUAD QUAD QUAD

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