SY89538LHG datasheet, PDF - EEWORLD Datasheet

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SY89538LHG: Description3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size631KB，23 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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SY89538LHG Overview

3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay

SY89538LHG Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	LEAD FREE, TQFP-64
Reach Compliance Code	compli
Interface integrated circuit type	INTERFACE CIRCUIT
JESD-30 code	S-PQFP-G64
JESD-609 code	e4
length	10 mm
Humidity sensitivity level	3
Number of functions	1
Number of terminals	64
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HTFQFP
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
Supply voltage 1-max	3.6 V
Mains voltage 1-minute	3 V
Supply voltage1-Nom	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	10 mm

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SY89538L

3.3V, Precision LVPECL and LVDS

Programmable Multiple Output Bank Clock

Synthesizer and Fanout Buffer with Zero Delay

General Description

The SY89538L integrated programmable clock

synthesizer and fanout is part of a precision PLL-

based clock generation family optimized for

enterprise switch, router, and multiprocessor server

applications. This family is ideal for generating

internal system timing requirements up to 750MHz for

multiple ASICs, FPGAs, and NPUs. These devices

integrate the following blocks into a single monolithic

IC:

•

PLL (Phase-Lock-Loop) based synthesizer

Zero-delay MUX and feedback capability

1:4 LVPECL fanout

1:3 LVDS fanout

Clock generator (dividers)

Logic translation (LVPECL, LVDS)

Precision Edge

Features

•

Integrated programmable synthesizer with multiple

output dividers, fanout buffers, and clock drivers

•

Zero-delay capability: 29.375MHz to 756MHz

•

Reference clock input: 9.325MHz to 756MHz

•

Input MUX accepts a reference and a crystal

(XTAL) source

– Ideal for reference backup clock source or

system test frequency source

– Patent-pending unique input MUX isolates XTAL

and reference inputs which minimizes crosstalk

•

Guaranteed AC performance:

– Output frequency range: 29.375MHz to 756MHz

– <150ps

total jitter

– <6ps

RMS

cycle-to-cycle jitter (XTAL Input)

– <8ps

deterministic jitter

– <0.7ps

RMS

crosstalk induced jitter

– <75ps output-to-output skew

•

TTL/CMOS-compatible control logic

•

Five-independently programmable output

frequency banks:

– Four differential LVPECL output banks

– One differential LVDS output bank with three

output pairs

•

Output bank synchronization control pin

•

Output enable

•

3.3V ±10% power supply (2.5V output capable)

•

Guaranteed over the industrial temperature range

(-40°C to +85°C)

•

Available in a 64-pin EPAD-TQFP

Five-independently programmable output

banks

This level of integration minimizes additive jitter and

part-to-part

skew

associated

with

discrete

alternatives, resulting in superior system-level timing

with reduced board space and power. For

applications that do not require a zero-delay function,

see the SY89537L.

All support documentation can be found on

Micrel’s web site at:

www.micrel.com.

Applications

•

Enterprise routers, switches, servers and

workstations

•

Parallel processor-based systems

•

Internal system clock generation for ASICs, NPUs

and FPGAs

Markets

•

LAN/WAN

•

Enterprise servers

•

Test and measurement

Precision Edge is a registered trademark of Micrel, Inc.

MLF and

MicroLeadFrame

are registered trademarks of Amkor Technology.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

January 2008

M9999-010808-E

hbwhelp@micrel.com

or (408) 955-1690

SY89538LHG Related Products

	SY89538LHG	SY89538L_06	SY89538L	SY89538LHGTR
Description	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay

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