M463S3254DK1-L7C datasheet, PDF

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M463S3254DK1-L7C: DescriptionSynchronous DRAM Module, 32MX64, 5.4ns, CMOS, MICRO, SODIMM-144; Categorystorage storage; File Size159KB，11 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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M463S3254DK1-L7C Overview

Synchronous DRAM Module, 32MX64, 5.4ns, CMOS, MICRO, SODIMM-144

M463S3254DK1-L7C Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SAMSUNG
Parts packaging code	MODULE
package instruction	DIMM, DIMM144,20
Contacts	144
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Maximum access time	5.4 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N144
memory density	2147483648 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	144
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM144,20
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum standby current	0.016 A
Maximum slew rate	1 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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M463S3254DK1

M463S3254DK1 SDRAM

SODIMM

GENERAL DESCRIPTION

The Samsung M463S3254DK1 is a 32M bit x 64 Synchronous

Dynamic RAM high density memory module. The Samsung

M463S3254DK1 consists of four CMOS 32M x 16 bit with 4banks

Synchronous DRAMs in TSOP-II 400mil package and a 2K

EEPROM in 8-pin TSSOP package on a 144-pin glass-epoxy sub-

strate. Three 0.1uF bypass capacitors are mounted on the printed

circuit board in parallel for each SDRAM. The M463S3254DK1 is a

Small Outline Dual In-line Memory Module and is intended for

mounting into 144-pin edge connector sockets.

Synchronous design allows precise cycle control with the use of

system clock. I/O transactions are possible on every clock cycle.

Range of operating frequencies, programmable latencies allows the

same device to be useful for a variety of high bandwidth, high per-

formance memory system applications.

PC100/PC133

µSODIMM

32Mx64 SDRAM

µSODIMM

based on 32Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD

FEATURE

• Performance range

Part No.

M463S3254DK1-C7C /L7C

M463S3254DK1-C7A /L7A

M463S3254DK1-C1H /L1H

M463S3254DK1-C1L /L1L

•

Max Freq. (Speed)

133MHz (7.5ns @ CL2)

133MHz (7.5ns @ CL3)

100MHz (10ns @ CL2)

100MHz (10ns @ CL3)

Burst mode operation

Auto & self refresh capability (8192 Cycles/64ms)

LVTTL compatible inputs and outputs

Single 3.3V

0.3V power supply

MRS cycle with address key programs

Latency (Access from column address)

Burst length (1, 2, 4, 8 & Full page)

Data scramble (Sequential & Interleave)

• All inputs are sampled at the positive going edge of the

system clock

• Serial presence detect with EEPROM

• PCB :

Height (30mm)

, double sided component

PIN CONFIGURATIONS (Front side/back side)

Front Pin

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQM0

DQM1

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

Back

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

DQM4

DQM5

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

Pin Front

DQ14

DQ15

Back

Front

DQ21

DQ22

DQ23

A10/AP

DQM2

DQM3

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

**SDA

100

102

104

106

108

110

112

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

Back

DQ53

DQ54

DQ55

BA0

BA1

A11

DQM6

DQM7

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

**SCL

DQ46 95

DQ47 97

NC 101

NC 103

105

107

Voltage Key

109

CLK0 62 CKE0 111

113

RAS 66 CAS 115

68 *CKE1 117

CS0

A12 119

*CS1 72 *A13 121

74 *CLK1 123

125

NC 127

NC 129

131

DQ16 84 DQ48 133

DQ17 86 DQ49 135

DQ18 88 DQ50 137

DQ19 90 DQ51 139

141

DQ20 94 DQ52 143

PIN NAMES

Pin Name

A0 ~ A12

BA0 ~ BA1

DQ0 ~ DQ63

CLK0

CKE0

CS0

RAS

CAS

DQM0 ~ 7

SDA

SCL

Function

Address input (Multiplexed)

Select bank

Data input/output

Clock input

Clock enable input

Chip select input

Row address storbe

Column address strobe

Write enable

DQM

Power supply (3.3V)

Ground

Serial data I/O

Serial clock

Don′t use

No connection

* These pins are not used in this module.

These pins should be NC in the system

which does not support SPD.

* SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.

Rev. 0.0 Jan. 2002

M463S3254DK1-L7C Related Products

	M463S3254DK1-L7C	M463S3254DK1-C7A	M463S3254DK1-C7C	M463S3254DK1-C1L	M463S3254DK1-C1H	M463S3254DK1-L1L	M463S3254DK1-L7A	M463S3254DK1-L1H
Description	Synchronous DRAM Module, 32MX64, 5.4ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 5.4ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 5.4ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 6ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 6ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 6ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 5.4ns, CMOS, MICRO, SODIMM-144	Synchronous DRAM Module, 32MX64, 6ns, CMOS, MICRO, SODIMM-144
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Maker	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG
Parts packaging code	MODULE	MODULE	MODULE	MODULE	MODULE	MODULE	MODULE	MODULE
package instruction	DIMM, DIMM144,20	DIMM, DIMM144,20	DIMM, DIMM144,20	DIMM, DIMM144,20	DIMM, DIMM144,20	DIMM, DIMM144,20	DIMM, DIMM144,20	DIMM, DIMM144,20
Contacts	144	144	144	144	144	144	144	144
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST
Maximum access time	5.4 ns	5.4 ns	5.4 ns	6 ns	6 ns	6 ns	5.4 ns	6 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz	133 MHz	133 MHz	100 MHz	100 MHz	100 MHz	133 MHz	100 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-XDMA-N144	R-XDMA-N144	R-XDMA-N144	R-XDMA-N144	R-XDMA-N144	R-XDMA-N144	R-XDMA-N144	R-XDMA-N144
memory density	2147483648 bit	2147483648 bit	2147483648 bit	2147483648 bit	2147483648 bit	2147483648 bit	2147483648 bit	2147483648 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE
memory width	64	64	64	64	64	64	64	64
Number of functions	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1
Number of terminals	144	144	144	144	144	144	144	144
word count	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words
character code	32000000	32000000	32000000	32000000	32000000	32000000	32000000	32000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	32MX64	32MX64	32MX64	32MX64	32MX64	32MX64	32MX64	32MX64
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
Encapsulate equivalent code	DIMM144,20	DIMM144,20	DIMM144,20	DIMM144,20	DIMM144,20	DIMM144,20	DIMM144,20	DIMM144,20
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192	8192	8192	8192
self refresh	YES	YES	YES	YES	YES	YES	YES	YES
Maximum standby current	0.016 A	0.016 A	0.016 A	0.016 A	0.016 A	0.016 A	0.016 A	0.016 A
Maximum slew rate	1 mA	0.92 mA	1 mA	0.88 mA	0.88 mA	0.88 mA	0.92 mA	0.88 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Base Number Matches	1	1	1	1	1	1	1	1

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