MM74HC4066 Quad Analog Switch
August 1984
Revised January 2005
MM74HC4066
Quad Analog Switch
General Description
The MM74HC4066 devices are digitally controlled analog
switches utilizing advanced silicon-gate CMOS technology.
These switches have low “ON” resistance and low “OFF”
leakages. They are bidirectional switches, thus any analog
input may be used as an output and visa-versa. Also the
MM74HC4066 switches contain linearization circuitry
which lowers the “ON” resistance and increases switch lin-
earity. The MM74HC4066 devices allow control of up to
12V (peak) analog signals with digital control signals of the
same range. Each switch has its own control input which
disables each switch when LOW. All analog inputs and out-
puts and digital inputs are protected from electrostatic
damage by diodes to V
CC
and ground.
Features
s
Typical switch enable time: 15 ns
s
Wide analog input voltage range: 0–12V
s
Low “ON” resistance: 30 typ. (MM74HC4066)
s
Low quiescent current: 80
µ
A maximum (74HC)
s
Matched switch characteristics
s
Individual switch controls
Ordering Code:
Package
Order Number
MM74HC4066M
MM74HC4066MX_NL
MM74HC4066SJ
MM74HC4066MTC
MM74HC4066N
Number
M14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Schematic Diagram
Connection Diagram
Truth Table
Input
CTL
L
H
Switch
I/O–O/I
“OFF”
“ON”
Top View
© 2005 Fairchild Semiconductor Corporation
DS005355
www.fairchildsemi.com
MM74HC4066
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
DC Control Input Voltage (V
IN
)
DC Switch I/O Voltage (V
IO
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
°
C
600 mW
500 mW
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
9.0V
1000
500
400
ns
ns
ns
0
V
CC
V
2
Max
12
Units
V
−
0.5 to
+
15V
−
1.5 to V
CC
+
1.5V
V
EE
−
0.5 to V
CC
+
0.5V
±
20 mA
±
25 mA
±
50 mA
−
65
°
C to
+
150
°
C
−
40
+
85
°
C
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating — plastic “N” package:
−
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
Conditions
(Note 4)
V
CC
2.0V
4.5V
9.0V
12.0V
T
A
=
25°C
Typ
1.5
3.15
6.3
8.4
0.5
1.35
2.7
3.6
100
50
30
120
50
35
20
10
5
5
170
85
70
180
80
60
40
15
10
10
±0.1
6.0V
9.0V
12.0V
6.0V
9.0V
12.0V
6.0V
9.0V
12.0V
10
15
20
10
15
20
±60
±80
±100
±40
±50
±60
2.0
4.0
8.0
T
A
= −40
to 85°C T
A
= −55
to 125°C
Guaranteed Limits
1.5
3.15
5.3
8.4
0.5
1.35
2.7
3.6
200
105
85
215
100
75
60
20
15
15
±1.0
±600
±800
±1000
±150
±200
±300
20
40
80
1.5
3.15
6.3
8.4
0.5
1.35
2.7
3.6
220
110
90
240
120
80
70
20
15
15
±1.0
±600
±800
±1000
±150
±200
±300
40
80
160
Units
V
V
V
V
V
V
V
V
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
µA
nA
nA
nA
nA
nA
nA
µA
µA
µA
V
IL
Maximum LOW Level
Input Voltage
2.0V
4.5V
9.0V
12.0V
R
ON
Maximum “ON” Resistance
(Note 5)
V
CTL
=
V
IH
, I
S
=
2.0 mA
V
IS
=
V
CC
to GND
(Figure 1)
V
CTL
=
V
IH
, I
S
=
2.0 mA
V
IS
=
V
CC
or GND
(Figure 1)
4.5V
9.0V
12.0
2.0V
4.5V
9.0V
12.0V
4.5V
9.0V
12.0V
R
ON
Maximum “ON” Resistance
Matching
V
CTL
=
V
IH
V
IS
=
V
CC
to GND
V
IN
=
V
CC
or GND
V
CC
=
2−6V
V
OS
=
V
CC
or GND
V
IS
=
GND or V
CC
V
CTL
=
V
IL
(Figure 3)
V
IS
=
V
CC
to GND
V
CTL
=
V
IH
V
OS
=
OPEN (Figure 2)
V
IN
=
V
CC
or GND
I
OUT
=
0
µA
I
IN
I
IZ
Maximum Control
Input Current
Maximum Switch “OFF”
Leakage Current
I
IZ
Maximum Switch “ON”
Leakage Current
I
CC
Maximum Quiescent
Supply Current
Note 4:
For a power supply of 5V
±10%
the worst case on resistance (R
ON
) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with
this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current occurs for
CMOS at the higher voltage and so the 5.5V values should be used.
Note 5:
At supply voltages (V
CC
–GND) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
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2
MM74HC4066
AC Electrical Characteristics
V
CC
= 2.0V
−
6.0V V
EE
= 0V
−
12V, C
L
= 50 pF (unless otherwise specified)
Symbol
Parameter
Conditions
V
CC
2.0V
4.5V
9.0V
12.0V
t
PZL
, t
PZH
Maximum Switch Turn
“ON” Delay
R
L
=
1 kΩ
2.0V
4.5V
9.0V
12.0V
t
PHZ
, t
PLZ
Maximum Switch Turn
“OFF” Delay
R
L
=
1 kΩ
2.0V
4.5V
9.0V
12.0V
f
MAX
Minimum Frequency
Response (Figure 7)
20 log (V
O
/V
I
)
= −3
dB
Crosstalk Between
any Two Switches
(Figure 8)
Peak Control to Switch
Feedthrough Noise (Figure 9)
Switch OFF Signal
Feedthrough
Isolation
(Figure 10)
THD
Total Harmonic
Distortion
(Figure 11)
C
IN
C
IN
C
IN
C
PD
Maximum Control
Input Capacitance
Maximum Switch
Input Capacitance
Maximum Feedthrough
Capacitance
Power Dissipation
Capacitance
Note 6:
Adjust 0 dBm for F
=
1 kHz (Null R
L
/R
ON
Attenuation).
Note 7:
V
IS
is centered at V
CC
/2.
Note 8:
Adjust input for 0 dBm.
T
A
=
25°C
Typ
25
5
4
3
30
12
6
5
60
25
20
15
40
100
50
10
8
7
100
20
12
10
168
36
32
30
T
A
= −40
to 85°C T
A
= −55
to 125°C
Guaranteed Limits
30
13
10
11
125
25
15
13
210
45
40
38
75
15
12
13
150
30
18
15
252
54
48
45
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
t
PHL
, t
PLH
Maximum Propagation
Delay Switch In to Out
R
L
=
600Ω
V
IS
=
2 V
PP
at (V
CC
/2)
(Note 6) (Note 7)
R
L
=
600Ω, F
=
1 MHz
(Note 7) (Note 8)
R
L
=
600Ω, F
=
1 MHz
C
L
=
50 pF
R
L
=
600Ω, F
=
1 MHz
V
(CT)
V
IL
(Note 7) (Note 8)
R
L
=
10 kΩ, C
L
=
50 pF,
F
=
1 kHz
V
IS
=
4 V
PP
V
IS
=
8 V
PP
4.5V
9.0V
4.5V
9.0V
4.5V
9.0V
−52
−50
100
250
dB
dB
mV
mV
4.5V
9.0V
−42
−44
dB
dB
4.5V
9.0V
.013
.008
5
20
10
10
10
%
%
pF
pF
pF
pF
V
CTL
=
GND
0.5
15
3
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MM74HC4066
AC Test Circuits and Switching Time Waveforms
FIGURE 1. “ON” Resistance
FIGURE 2. “ON” Channel Leakage Current
FIGURE 3. “OFF” Channel Leakage Current
FIGURE 4. t
PHL
, t
PLH
Propagation Delay Time Signal Input to Signal Output
FIGURE 5. t
PZL
, t
PLZ
Propagation Delay Time Control to Signal Output
FIGURE 6. t
PZH
, t
PHZ
Propagation Delay Time Control to Signal Output
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4
MM74HC4066
AC Test Circuits and Switching Time Waveforms
(Continued)
FIGURE 7. Frequency Response
FIGURE 8. Crosstalk: Control Input to Signal Output
FIGURE 9. Crosstalk Between Any Two Switches
FIGURE 10. Switch OFF Signal Feedthrough Isolation
FIGURE 11. Sinewave Distortion
5
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