71V2546S150PFG datasheet, PDF - EEWORLD Datasheet

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71V2546S150PFG: DescriptionTQFP-100, Tray; Categorystorage storage; File Size251KB，22 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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71V2546S150PFG Overview

TQFP-100, Tray

71V2546S150PFG Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	TQFP
package instruction	LQFP, QFP100,.63X.87
Contacts	100
Manufacturer packaging code	PKG100
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Samacsys Description	TQFP 14.0 X 20.0 X 1.4 MM
Maximum access time	3.8 ns
Other features	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	150 MHz
I/O type	COMMON
JESD-30 code	R-PQFP-G100
JESD-609 code	e3
length	20 mm
memory density	4718592 bit
Memory IC Type	ZBT SRAM
memory width	36
Humidity sensitivity level	3
Number of functions	1
Number of terminals	100
word count	131072 words
character code	128000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX36
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP100,.63X.87
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	2.5,3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.04 A
Minimum standby current	3.14 V
Maximum slew rate	0.325 mA
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	14 mm
Base Number Matches	1

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128K x 36

3.3V Synchronous ZBT™ SRAM

2.5V I/O, Burst Counter

Pipelined Outputs

◆

71V2546S

Features

128K x 36 memory configurations

Supports high performance system speed - 150 MHz

(3.8 ns Clock-to-Data Access)

ZBT

Feature - No dead cycles between write and read

cycles

Internally synchronized output buffer enable eliminates the

need to control

Single R/W (READ/WRITE) control pin

Positive clock-edge triggered address, data, and control

signal registers for fully pipelined applications

◆

4-word burst capability (interleaved or linear)

Individual byte write (BW

) control (May tie active)

Three chip enables for simple depth expansion

3.3V power supply (±5%), 2.5V I/O Supply (V

DDQ)

Packaged in a JEDEC standard 100-pin plastic thin quad

flatpack (TQFP) and 119 ball grid array (BGA)

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

Green parts available, see ordering information

Functional Block Diagram

LBO

Address A [0:16]

CE1,

CE,

CE2

R/W

CEN

ADV/LD

BWx

Clk

Control

128Kx36 BIT

MEMORY ARRAY

Address

Input Register

Control Logic

Mux

Sel

Clk

Clock

Output Register

Gate

5294 drw 01a

Data I/O [0:31],

I/O P[1:4]

ZBT and ZeroBus Turnaround are trademarks of Renesas and the architecture is supported by Micron Technology and Motorola Inc.

Aug.12.20

71V2546S150PFG Related Products

	71V2546S150PFG	71V2546S133BGI8	71V2546S150BG8	71V2546S133BGI	71V2546S100BGI	71V2546S100BG	71V2546S100BG8	71V2546S150BG	71V2546S133BG
Description	TQFP-100, Tray	PBGA-119, Reel	PBGA-119, Reel	PBGA-119, Tray	PBGA-119, Tray	PBGA-119, Tray	PBGA-119, Reel	PBGA-119, Tray	PBGA-119, Tray
Brand Name	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	conform to	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	TQFP	PBGA	PBGA	PBGA	PBGA	PBGA	PBGA	PBGA	PBGA
package instruction	LQFP, QFP100,.63X.87	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50	BGA, BGA119,7X17,50
Contacts	100	119	119	119	119	119	119	119	119
Manufacturer packaging code	PKG100	BG119	BG119	BG119	BG119	BG119	BG119	BG119	BG119
Reach Compliance Code	compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	3.8 ns	4.2 ns	3.8 ns	4.2 ns	5 ns	5 ns	5 ns	3.8 ns	4.2 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	150 MHz	133 MHz	150 MHz	133 MHz	100 MHz	100 MHz	100 MHz	150 MHz	133 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-PQFP-G100	R-PBGA-B119	R-PBGA-B119	R-PBGA-B119	R-PBGA-B119	R-PBGA-B119	R-PBGA-B119	R-PBGA-B119	R-PBGA-B119
JESD-609 code	e3	e0	e0	e0	e0	e0	e0	e0	e0
length	20 mm	22 mm	22 mm	22 mm	22 mm	22 mm	22 mm	22 mm	22 mm
memory density	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit
Memory IC Type	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM
memory width	36	36	36	36	36	36	36	36	36
Humidity sensitivity level	3	3	3	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1	1	1	1
Number of terminals	100	119	119	119	119	119	119	119	119
word count	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words
character code	128000	128000	128000	128000	128000	128000	128000	128000	128000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Minimum operating temperature	-	-40 °C	-	-40 °C	-40 °C	-40 °C	-	-	-40 °C
organize	128KX36	128KX36	128KX36	128KX36	128KX36	128KX36	128KX36	128KX36	128KX36
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
Encapsulate equivalent code	QFP100,.63X.87	BGA119,7X17,50	BGA119,7X17,50	BGA119,7X17,50	BGA119,7X17,50	BGA119,7X17,50	BGA119,7X17,50	BGA119,7X17,50	BGA119,7X17,50
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	260	225	225	225	225	225	225	225	225
power supply	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	2.36 mm	2.36 mm	2.36 mm	2.36 mm	2.36 mm	2.36 mm	2.36 mm	2.36 mm
Maximum standby current	0.04 A	0.045 A	0.04 A	0.045 A	0.045 A	0.04 A	0.04 A	0.04 A	0.04 A
Minimum standby current	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V
Maximum slew rate	0.325 mA	0.31 mA	0.325 mA	0.31 mA	0.26 mA	0.25 mA	0.25 mA	0.325 mA	0.3 mA
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	OTHER	COMMERCIAL	OTHER	OTHER	OTHER	COMMERCIAL	COMMERCIAL	OTHER
Terminal surface	Matte Tin (Sn) - annealed	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)
Terminal form	GULL WING	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.65 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	30	20	20	20	20	20	20	20	20
width	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Samacsys Description	TQFP 14.0 X 20.0 X 1.4 MM	PBGA 14. X 22.0 MM X 1.27 MM PITCH	-	-	PBGA 14. X 22.0 MM X 1.27 MM PITCH	PBGA 14. X 22.0 MM X 1.27 MM PITCH	PBGA 14. X 22.0 MM X 1.27 MM PITCH	PBGA 14. X 22.0 MM X 1.27 MM PITCH	PBGA 14. X 22.0 MM X 1.27 MM PITCH

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