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5962-8685924YA

Description
CDIP-22, Tube
Categorystorage    storage   
File Size147KB,11 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

5962-8685924YA Overview

CDIP-22, Tube

5962-8685924YA Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeCDIP
package instructionDIP, DIP22,.3
Contacts22
Manufacturer packaging codeCD22
Reach Compliance Codenot_compliant
ECCN code3A001.A.2.C
Maximum access time35 ns
I/O typeCOMMON
JESD-30 codeR-CDIP-T22
JESD-609 codee0
length27.555 mm
memory density65536 bit
Memory IC TypeOTHER SRAM
memory width4
Humidity sensitivity level1
Number of functions1
Number of ports1
Number of terminals22
word count16384 words
character code16000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize16KX4
Output characteristics3-STATE
ExportableNO
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP22,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height5.08 mm
Maximum standby current0.025 A
Minimum standby current4.5 V
Maximum slew rate0.115 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1
HIGH-SPEED
4K x 8 DUAL-PORT
STATIC SRAM
Features
High-speed access
– Military: 25/35/45/55/70ns (max.)
– Industrial: 55ns (max.)
– Commercial: 20/25/35/45/55/70ns (max.)
Low-power operation
– IDT7134SA
Active: 700mW (typ.)
Standby: 5mW (typ.)
– IDT7134LA
Active: 700mW (typ.)
Standby: 1mW (typ.)
Fully asynchronous operation from either port
Battery backup operation—2V data retention
TTL-compatible; single 5V (±10%) power supply
Available in 48-pin DIP, LCC, Flatpack and 52-pin PLCC
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available for
selected speeds
IDT7134SA/LA
Description
x
x
x
x
x
x
x
x
The IDT7134 is a high-speed 4K x 8 Dual-Port Static RAM
designed to be used in systems where on-chip hardware port arbitration
is not needed. This part lends itself to those systems which cannot
tolerate wait states or are designed to be able to externally arbitrate or
withstand contention when both sides simultaneously access the
same Dual-Port RAM location.
The IDT7134 provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access
for reads or writes to any location in memory. It is the user’s responsibility
to ensure data integrity when simultaneously accessing the same
memory location from both ports. An automatic power down feature,
controlled by
CE,
permits the on-chip circuitry of each port to enter a
very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
Dual-Port typically operate on only 700mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each port
typically consuming 200µW from a 2V battery.
The IDT7134 is packaged on either a sidebraze or plastic 48-pin
DIP, 48-pin LCC, 52-pin PLCC and 48-pin Flatpack. Military grade
product is manufactured in compliance with the latest revision of MIL-
PRF-38535 QML, making it ideally suited to military temperature
applications demanding the highest level of performance and reliability.
Functional Block Diagram
R/W
L
CE
L
R/W
R
CE
R
OE
L
I/O
0L
- I/O
7L
COLUMN
I/O
COLUMN
I/O
OE
R
I/O
0R
- I/O
7R
A
0L
- A
11L
LEFT SIDE
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
RIGHT SIDE
ADDRESS
DECODE
LOGIC
A
0R
- A
11R
2720 drw 01
JUNE 1999
1
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