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IDT70V07L25JGI8

Description
Dual-Port SRAM, 32KX8, 25ns, CMOS, PQCC68, PLASTIC, LCC-68
Categorystorage    storage   
File Size178KB,17 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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IDT70V07L25JGI8 Overview

Dual-Port SRAM, 32KX8, 25ns, CMOS, PQCC68, PLASTIC, LCC-68

IDT70V07L25JGI8 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeLCC
package instructionQCCJ,
Contacts68
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time25 ns
JESD-30 codeS-PQCC-J68
JESD-609 codee3
length24.2062 mm
memory density262144 bit
Memory IC TypeDUAL-PORT SRAM
memory width8
Number of functions1
Number of terminals68
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height4.572 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width24.2062 mm
Base Number Matches1
HIGH-SPEED 3.3V
32K x 8 DUAL-PORT
STATIC RAM
Features
PRELIMINARY
IDT70V07S/L
x
x
x
x
x
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Commercial: 25/35/55ns (max.)
Low-power operation
– IDT70V07S
Active: 300mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V07L
Active: 300mW (typ.)
Standby: 660
µ
W (typ.)
IDT70V07 easily expands data bus width to 16 bits or more
using the Master/Slave select when cascading more than
one device
M/S = V
IH
for
BUSY
output flag on Master
M/S = V
IL
for
BUSY
input on Slave
x
x
x
x
x
x
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 3.3V (±0.3V) power supply
Available in 68-pin PGA and PLCC, and a 80-pin TQFP
Description
The IDT70V07 is a high-speed 32K x 8 Dual-Port Static RAM. The
IDT70V07 is designed to be used as a stand-alone 256K-bit Dual-Port
RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-
or-more word systems. Using the IDT MASTER/SLAVE Dual-Port
RAM approach in 16-bit or wider memory system applications results
in full-speed, error-free operation without the need for additional
Functional Block Diagram
OE
L
CE
L
R/W
L
OE
R
CE
R
R/W
R
I/O
0L
- I/O
7L
I/O
Control
BUSY
L
A
14L
A
0L
(1,2)
I/O
Control
I/O
0R
-I/O
7R
,
BUSY
R
Address
Decoder
15
(1,2)
MEMORY
ARRAY
15
Address
Decoder
A
14R
A
0R
CE
L
OE
L
R/W
L
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
R
OE
R
R/W
R
SEM
L
(2)
INT
L
NOTES:
1. (MASTER):
BUSY
is output; (SLAVE):
BUSY
is input.
2.
BUSY
and
INT
outputs are non-tri-stated push-pull.
M/S
SEM
R
INT
R(2)
2943 drw 01
JUNE 1999
1
DSC 2943/5
©1998 Integrated Device Technology, Inc.

IDT70V07L25JGI8 Related Products

IDT70V07L25JGI8 70V07L25JGI8
Description Dual-Port SRAM, 32KX8, 25ns, CMOS, PQCC68, PLASTIC, LCC-68 Dual-Port SRAM, 32KX8, 25ns, CMOS, PQCC68, PLASTIC, LCC-68
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code LCC LCC
package instruction QCCJ, QCCJ,
Contacts 68 68
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Maximum access time 25 ns 25 ns
JESD-30 code S-PQCC-J68 S-PQCC-J68
JESD-609 code e3 e3
length 24.2062 mm 24.2062 mm
memory density 262144 bit 262144 bit
Memory IC Type DUAL-PORT SRAM DUAL-PORT SRAM
memory width 8 8
Number of functions 1 1
Number of terminals 68 68
word count 32768 words 32768 words
character code 32000 32000
Operating mode ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
organize 32KX8 32KX8
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ QCCJ
Package shape SQUARE SQUARE
Package form CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 260 260
Certification status Not Qualified Not Qualified
Maximum seat height 4.572 mm 4.572 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface MATTE TIN MATTE TIN
Terminal form J BEND J BEND
Terminal pitch 1.27 mm 1.27 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 30
width 24.2062 mm 24.2062 mm
Base Number Matches 1 1
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