74ALVCH162240
LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
PRELIMINARY DATA
s
s
s
s
s
s
s
s
s
s
3.6V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED :
t
PD
= 4.2 ns (MAX.) at V
CC
= 3.0 to 3.6V
t
PD
= 4.9 ns (MAX.) at V
CC
= 2.3 to 2.7V
t
PD
= 6.5 ns (MAX.) at V
CC
= 1.65V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 12mA (MIN) at V
CC
= 3.0V
|I
OH
| = I
OL
= 6mA (MIN) at V
CC
= 2.3V
|I
OH
| = I
OL
= 2mA (MIN) at V
CC
= 1.65V
BUS HOLD PROVIDED ON DATA INPUTS
26Ω SERIE RESISTORS IN OUTPUTS
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 3.6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16240
LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74ALVCH162240TTR
PIN CONNECTION
DESCRIPTION
The 74ALVCH162240 is a low voltage CMOS 16
BIT BUS BUFFER (INVERTED) fabricated with
sub-micron silicon gate and five-layer metal wiring
C
2
MOS technology. It is ideal for low power and
very high speed 1.65 to 3.6V applications; it can
be interfaced to 3.6V signal environment for both
inputs and outputs.
Any nG output control governs four BUS
BUFFERS. Output Enable input (nG) tied together
gives full 16-bit operation.
When nG is LOW, the outputs are enabled. When
nG is HIGH, the output are in high impedance
state. Active bus-hold circuitry is provided to hold
unused or floating data inputs at a valid logic level.
This device is designed to be used with 3 state
memory address drivers, etc.
The device circuits is including 26Ω series
resistance in the outputs. These resistors permit
to reduce line noise in high speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
February 2003
1/10
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
74ALVCH162240
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage (OFF State)
DC Output Voltage (High or Low State) (note 1)
DC Input Diode Current
DC Output Diode Current (note 2)
DC Output Current
Parameter
Value
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
-0.5 to V
CC
+ 0.5
- 50
- 50
±
50
±
100
400
-65 to +150
300
Unit
V
V
V
V
mA
mA
mA
mA
mW
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current per Supply Pin
Power Dissipation
P
D
T
stg
T
L
Storage Temperature
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
O
absolute maximum rating must be observed
2) V
O
< GND, V
O
> V
CC
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
V
O
I
OH
, I
OL
I
OH
, I
OL
I
OH
, I
OL
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage (OFF State)
Output Voltage (High or Low State)
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
High or Low Level Output Current (V
CC
= 2.3 to 2.7V)
High or Low Level Output Current (V
CC
= 1.65 to 1.95 V)
Operating Temperature
Input Rise and Fall Time (note 1)
Parameter
Value
1.65 to 3.6
-0.3 to 3.6
0 to 3.6
0 to V
CC
±
12
±
6
±
2
-55 to 125
0 to 10
Unit
V
V
V
V
mA
mA
mA
°C
ns/V
1) V
IN
from 0.8V to 2V at V
CC
= 3.0V
3/10
74ALVCH162240
AC ELECTRICAL CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
C
L
(pF)
30
30
50
50
30
30
50
50
30
30
50
50
R
L
(Ω)
1000
500
500
500
1000
500
500
500
1000
500
500
500
t
s
=
t
r
(ns)
2.0
2.0
2.5
2.5
2.0
2.0
2.5
2.5
2.0
2.0
2.5
2.5
-40 to 85 °C
Min.
1
1
1
1
1
1
1
1
1
1
1
1
Max.
6.5
4.9
4.7
4.2
8.5
6.8
6.7
5.6
8.2
6.3
5.7
5.5
Value
-55 to 125 °C
Min.
1
1
1
1
1
1
1
1
1
1
1
1
Max.
6.5
4.9
4.7
4.2
8.5
6.8
6.7
5.6
8.2
6.3
5.7
5.5
Unit
t
PLH
t
PHL
Propagation Delay
Time
t
PZL
t
PZH
Output Enable Time
ns
t
PLZ
t
PHZ
Output Disable Time
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
3.3
3.3
2.5
3.3
2.5
V
IN
=V
CC
or GND
V
IN
=V
CC
or GND
V
IN
= 0 to V
CC
f
IN
= 10MHz
C
L
=50pF
V
IN
= 0 or V
CC
Value
T
A
= 25 °C
Min.
Typ.
3
6
7
19
16
5
4
Max.
pF
pF
pF
Unit
C
IN
C
IN
C
OUT
C
PD
C
PD
Input Capacitance Control
Inputs
Input Capacitance Data Inputs
Output Capacitance
Power Dissipation Capacitance
Output enabled (note 1)
Power Dissipation Capacitance
Output disabled (note 1)
pF
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/16 (per
circuit)
5/10
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