5962-8984105LA datasheet, PDF - EEWORLD Datasheet

5962-8984105LA: DescriptionFlash PLD, 15ns, PAL-Type, CMOS, CDIP24, CERAMIC, DIP-24; CategoryProgrammable logic Programmable logic devices; File Size424KB，14 Pages; Manufacturere2v technologies

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5962-8984105LA Overview

Flash PLD, 15ns, PAL-Type, CMOS, CDIP24, CERAMIC, DIP-24

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	e2v technologies
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Other features	IT ALSO AVAILABLE IN GDIP-24 PACKAGE, CORRECT SUBGROUP EEPLD
Architecture	PAL-TYPE
maximum clock frequency	42 MHz
JESD-30 code	R-CDIP-T24
JESD-609 code	e0
length	32 mm
Dedicated input times	11
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	FLASH PLD
propagation delay	15 ns
Certification status	Qualified
Filter level	MIL-STD-883
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

	5962-8984105LA	5962-89841053X
Description	Flash PLD, 15ns, PAL-Type, CMOS, CDIP24, CERAMIC, DIP-24	EE PLD, 15ns, CMOS, CQCC28, CERAMIC, LCC-28
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Parts packaging code	DIP	QLCC
package instruction	DIP, DIP24,.3	QCCN,
Contacts	24	28
Reach Compliance Code	compliant	compliant
ECCN code	3A001.A.2.C	3A001.A.2.C
maximum clock frequency	42 MHz	55.55 MHz
JESD-30 code	R-CDIP-T24	S-CQCC-N28
JESD-609 code	e0	e0
length	32 mm	11.43 mm
Dedicated input times	11	11
Number of I/O lines	10	10
Number of terminals	24	28
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
organize	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL	REGISTERED
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	QCCN
Package shape	RECTANGULAR	SQUARE
Package form	IN-LINE	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
Programmable logic type	FLASH PLD	EE PLD
propagation delay	15 ns	15 ns
Certification status	Qualified	Qualified
Maximum seat height	5.08 mm	2.54 mm
Maximum supply voltage	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V
surface mount	NO	YES
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal surface	TIN LEAD	TIN LEAD
Terminal form	THROUGH-HOLE	NO LEAD
Terminal pitch	2.54 mm	1.27 mm
Terminal location	DUAL	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	7.62 mm	11.43 mm
Base Number Matches	1	1

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