HV256
32-Channel High Voltage
Amplifier Array
Features
►
►
►
►
►
►
►
►
►
32 independent high voltage amplifiers
300V operating voltage
295V output voltage
2.2V/µs typical output slew rate
Adjustable output current source limit
Adjustable output current sink limit
Internal closed loop gain of 72V/V
12MΩ feedback impedance
Layout ideal for die applications
General Description
The Supertex HV256 is a 32-channel high voltage amplifier
array integrated circuit. It operates on a single high voltage
supply, up to 300V, and two low voltage supplies, V
DD
and
V
NN
.
The input voltage range is from 0V to 4.096V. The internal
closed loop gain is 72V/V, giving an output voltage of 295V
when 4.096V is applied. Input voltages of up to 5V can be
applied, but will cause the output to saturate. The maximum
output voltage swing is 5V below the V
PP
high voltage supply.
The outputs can drive capacitive loads of up to 3000pF.
The maximum output source and sink current can be adjusted
by using two external resistors. An external R
SOURCE
resistor
controls the maximum sourcing current and an external R
SINK
resistor controls the maximum sinking current. The current
limit is approximately 12.5V divided by the external resistor
value. The setting is common for all 32 outputs. A low voltage
silicon junction diode is made available to help monitor the die
temperature.
Applications
►
MEMS (microelectromechanical systems) driver
►
Piezoelectric transducer driver
►
Optical crosspoint switches
(using MEMS technology)
Typical Application Circuit
Micro
Processor
DAC
DAC
DAC
DAC
Supertex
HV256
V
IN
0
V
IN
1
V
IN
2
V
IN
3
V
DD
V
PP
HV
OUT
0
HV
OUT
1
HV
OUT
2
x
y
y
x
High Voltage
Op-Amp
Array
HV
OUT
3
MEMS
Array
HV
OUT
30
HV
OUT
31
DAC
DAC
V
IN
30
V
IN
31
R
SOURCE
R
SINK
A
GND
V
NN
HV256
Device
HV256
-G indicates package is RoHS compliant (‘Green’)
Package Option
100-Lead MQFP
HV256FG
HV256FG-G
Absolute Maximum Ratings
Parameter
V
PP
, High voltage supply
AV
DD
, Analog low voltage positive supply
DV
DD
, Digital low voltage positive supply
AV
NN
, Analog low voltage negative supply
DV
NN
, Digital low voltage negative supply
Logic input voltage
V
SIG
, Analog input signal
SRV
PP
, V
PP
ramp up/down
Storage temperature range
Maximum junction temperature
Value
310V
8.0V
8.0V
-7.0V
-7.0V
-0.5V to DV
DD
0V to 6.0V
TBDV/usec
-65°C to 150°C
150°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device at the
absolute rating level may affect device reliability. All voltages are referenced to device ground.
Operating Conditions
Symbol
V
PP
V
DD
V
NN
I
PP
I
DD
I
NN
T
J
Parameter
High voltage positive supply
Low voltage positive supply
Low voltage negative supply
V
PP
supply current
V
DD
supply current
V
NN
supply current
Operating temperature range
Min
125
6.0
-4.5
-
-
-6.0
-10
Typ
-
-
-
-
-
-
-
Max
300
7.5
-6.5
0.8
5.0
-
85
Units
V
V
V
mA
mA
mA
°C
Conditions
---
---
---
V
PP
= 300V, All HV
OUT
= 0V No load
V
DD
= 6.0V to 7.5V
V
NN
= -4.5V to -6.5V
---
Electrical Characteristics
(over operating conditions, unless otherwise specified)
High Voltage Amplifier
Symbol
HV
OUT
V
IN
V
INOS
SR
BW
A
O
A
V
R
FB
C
LOAD
I
SOURCE
I
SINK
R
SOURCE
R
SINK
CT
DC
PSRR
Parameter
HV
OUT
voltage swing
Input voltage range
Input voltage offset
HV
OUT
slew rate rise
HV
OUT
slew rate fall
HV
OUT
-3dB channel bandwidth
Open loop gain
Closed loop gain
Feedback resistance from HV
OUT
to ground
HV
OUT
t capacitive load
HV
OUT
sourcing current limiting range
HV
OUT
sinking current limiting range
External resistance range for setting
maximum current source
External resistance range for setting
maximum current sink
DC channel to channel crosstalk
Power supply rejection ratio for V
PP
, V
DD
, V
NN
Min
0
0
-
-
-
-
70
68.4
9.6
0
385
385
25
25
-80
-40
Typ
-
-
-
2.2
2.0
4.0
100
72
12
-
550
550
-
-
-
-
Max
V
PP
- 5.0
5.0
±50
-
-
-
-
75.6
-
3000
715
715
250
250
-
-
Units
V
V
mV
V/µs
V/µs
KHz
dB
V/V
MΩ
pF
µA
µA
KΩ
KΩ
dB
dB
Conditions
---
---
Input referred
No Load
No Load
V
PP
= 300V
---
---
---
---
R
SOURCE
= 25KΩ
R
SINK
= 25KΩ
---
---
---
---
2
HV256
Temperature Diode
Symbol
PIV
V
F
I
F
T
C
Parameter
Peak inverse voltage
Forward diode drop
Forward diode current
V
F
temperature coefficient
Min
-
-
-
-
Typ
-
0.6
-
-2.2
Max
5.0
-
100
-
Units
V
V
µA
mV/°C
Conditions
cathode to anode
I
F
= 100µA, anode to cathode at T
A
= 25°C
anode to cathode
anode to cathode
HV256 Block Diagram
B
YP
-V
PP
B
YP
-V
DD
B
YP
-V
NN
To internal V
PP
bus
To internal V
DD
bus
To internal V
NN
bus
Output Current Source
Limiting for all HV
OUT
Output Current Sink
Limiting for all HV
OUT
R
SOURCE
R
SINK
V
PP
V
DD
V
DD
V
PP
V
DD
V
PP
GND
V
NN
Anode
Cathode
+
V
IN
31
+
V
IN
1
+
HV
OUT
0
V
IN
0
-
V
NN
71R
R
HV
OUT
1
V
NN
71R
R
-
-
3
HV
OUT
31
71R
R
HV256
Power Up/Down Issues
External Diode Protection
The device can be damaged due to improper power up / down
sequence. To prevent damage, please follow the acceptable power
up / down sequences, and add two external diodes as shown in
the diagram on the right. The first diode is a high voltage diode
across V
PP
and V
DD
, where the anode of the diode is connected
to V
DD
and the cathode of the diode is connected to V
PP
. Any low
current, high voltage diode, such as a 1N4004, will be adequate.
The second diode is a Schottky diode across V
NN
and D
GND
, where
the anode of the Schottky diode is connected to V
NN
, and the
cathode is connected to D
GND
. Any low current Schottky diode such
as a 1N5817 will be adequate.
External Diode Protection Connection
V
DD
1N4004 or similar
V
PP
V
NN
1N5817 or similar
D
GND
Suggested Power Up/Down Sequence
The HV256 needs all power supplies to be fully up and all channels
refreshed with V
SIG
= 0V to force all high voltage outputs to 0V.
Before that time, the high voltage outputs may have temporary
voltage excursions above or below GND level depending on
selected power up sequence. To minimize the excursions:
1. The V
DD
and V
NN
power supplies should be applied at the same
time (or within a few nanoseconds).
Suggested V
PP
ramp up speed should be 10msec or longer and
ramp down to be 1msec or longer.
Acceptable Power Up Sequences
The HV256 can be powered up with any of the following sequences
listed below.
1) V
PP
2) V
NN
3) V
DD
4) Inputs and Anode
1) V
NN
2) V
DD
3) V
PP
4) Inputs and Anode
1) V
DD
& V
NN
2) Inputs 3) V
PP
4) Anode
Acceptable Power Down Sequences
The HV256 can be powered down with any of the following
sequences listed below.
1) Inputs and Anode 2) V
DD
3) V
NN
4) V
PP
1) Inputs and Anode 2) V
PP
3) V
DD
4) V
NN
1) Anode 2) V
PP
3) Inputs 4) V
NN
& V
DD
Recommended Power Up/Down Timing
300V
V
PP
V
DD
V
NN
V
IN
HV
OUT
Gnd +/- V offset X 72
0V
6.5V
0V
0V
-5.5V
0V
0V
HV
OUT
Level at Power UP
V
PP
V
DD
V
NN
Power Up Sequence
V
DD
Before V
NN
0V
V
NN
Before V
DD
V
PP
V
DD
V
NN
0V
6.5V
0V
6.5V
0V
0V
-5.5V
0V
-5.5V
HV
OUT
0V
-5.5V
HV
OUT
6.5V
0V
4
HV256
R
SINK
/ R
SOURCE
The V
DD_BYP
,V
DD_BYP
,and V
NN_BYP
pins are internal. high impedance
current. mirror gate nodes, brought out to mantain stable opamp
biasing currents in noisy power supply environments. 0.1uF/25V
bypass capacitors, added from V
PP_BYP
pin to V
PP
, from V
DD_BYP
pin
to V
DD
, and from V
NN_BYP
to V
NN
,will force the high impedance gate
V
PP
B
YP
_V
PP
Cap
0.1uF / 25V
B
YP
_V
PP
B
YP
_V
DD
B
YP
_V
DD
Cap
0.1uF / 25V
V
DD
B
YP
_V
NN
B
YP
_V
NN
Cap
0.1uF / 25V
V
NN
Current limit
Set by R
SINK
Current limit
nodes to follow fluctuation of power lines. The expected voltages
at the V
DD_BYP
, and V
NN_BYP
pins are typically 1.5 volts from their
respectful power supply. The expected voltage at V
PP_BYP
is typically
3V below V
PP
.
Set by R
SOURCE
To internal biasing
HV
OUT
0
HV
OUT
31
HVOpamp
HVOpamp
Typical Characteristics
I
SINK vs
R
SINK
(V
PP
= 300V, V
DD
= 6.5V, V
NN
= 5.5V, T
A
= 25
O
C)
600
I
SOURCE vs
R
SOURCE
(V
PP
= 300V, V
DD
= 6.5V, V
NN
= 5.5V, T
A
= 25
O
C)
600
500
500
400
I
SOURCE
(µA)
400
300
I
SINK
(µA)
300
200
200
100
max
min
max
100
min
0
25k
150k
250k
0
25k
150k
250k
R
SOURCE
(KΩ)
R
SINK
(KΩ)
5
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