AN123
U
S I N G T H E
DAC
A S A
F
U N C T I O N
G
E N E R A T O R
Relevant Devices
This application note applies to the following devices:
Implementation
The main routine of this program is a command
C8051F020, C8051F021, C8051F022, and
interpreter that sets parameters for the Timer 4
C8051F023.
interrupt service routine (ISR) which manages the
DAC updates. The Timer 4 interrupts occur at a
predetermined rate set at compile time. In the
Introduction
included software example, this value is stored in
This document describes how to implement an the constant <SAMPLE_RATE_DAC>. The
interrupt driven multifunction generator on C8051 Timer 4 ISR updates the DAC and calculates or
devices using the on-chip digital-to-analog con- looks up the next output value based on the wave-
verter (DAC).
form settings.
Features
•
Four different waveforms expandable to any
periodic function defined in a table.
- Sine Wave (Table Defined)
- Square Wave (Calculated)
- Triangle Wave (Calculated)
- Saw Tooth Wave (Calculated)
•
•
Allows selection of the frequency and ampli-
tude of waveform at run time.
An interactive interface with a PC using the
serial communications port and HyperTerminal
or an equivalent program.
Setting up the DAC
Any free DAC, referred to as DACn, may be used
to generate waveforms. In this example DACn is
used in left-justified mode with output scheduling
based on Timer 4 overflows. Refer to the data sheet
for specific information on how to set the DAC-
nCN register to specify DACn modes.
When the DAC is configured to left-justified mode,
16-bit data can be written to the 12-bit data register
with no shifting required. In this case, the 4 least
significant bits are ignored.
In this example, DACn updates occur on Timer 4
overflows, meaning writes to DACnH and DACnL
have no immediate effect on the DAC output, but
instead are held until the next Timer 4 overflow.
Another important note is that the internal voltage
reference must be enabled by setting the appropri-
ate bits in the REFnCN register before the DAC
can be used.
Key Points
•
•
•
Output waveforms have 16-bit frequency reso-
lution using the phase accumulator approach.
The on-chip DAC’s can support waveform gen-
eration up to 50 kHz.
By using a 16-bit lookup table with a 12-bit
DAC, error in the amplitude is virtually elimi-
nated.
Sampling Rate
The sampling rate is configured by initializing the
Timer 4 reload value with the number of SYSCLK
Rev. 1.1 12/03
Copyright © 2003 by Silicon Laboratories
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cycles between interrupts. This number is negative from 0 to 65535, and a vertical 2’s complement
because C8051 timers are up-counters and can be amplitude axis ranging from -32768 to 32767.
calculated using the following formula:
All waveforms generated use a 16-bit phase accu-
mulator which keeps track of where the output
(
–
SYSCLK
)
Timer 4 Reload
= ----------------------------------------------------------
-
waveform is on the horizontal axis. This phase
SAMPLE_RATE_DAC
accumulator provides a frequency resolution of
1.2 Hz, given a DAC update rate of 80 kHz. Based
The maximum sampling rate allowed by the DAC
on waveform settings, the first stage of Timer 4
is approximately 100 kHz, given by the 10 µs out-
ISR either calculates or looks up the next DAC out-
put settling time. However, use caution when
put level corresponding to the phase accumulator.
selecting the DAC sampling rate because all
The phase accumulator is incremented by the vari-
instructions in the longest path of the ISR must be
able <phase_add> every time the Timer 4 ISR is
executed before the next Timer 4 interrupt, or the
called. The magnitude of <phase_add> is deter-
output frequency will be affected. For example,
mined by the desired output frequency based on
using a SYSCLK of 22.1 MHz and a DAC update
rate of 80 kHz allows 276 SYSCLK cycles for the this formula:
ISR to finish execution. The main trade-off is
PHASE_PRECISION
-
phase_add
=
frequency
×
----------------------------------------------------------
SAMPLE_RATE_DAC
between the sampling rate and the execution time
of the Timer 4 ISR. One way execution time of the
where PHASE_PRECISION = 65536
ISR can be reduced to achieve a higher sampling
rate is by removing the gain adjustment stage. Also
note that the maximum output frequency is limited
The entries in the lookup table and the results of the
to no more than one half the sampling rate (Nyquist
initial calculations are full-scale values. The second
theorem).
stage of the Timer 4 ISR scales the output level
according to the <amplitude> parameter specified
Waveform Generation
at the command prompt.
Waveform generation occurs entirely in the
The final processing stage converts the scaled
Timer 4 ISR and is implemented in three stages.
2’s complement value to an unsigned unipolar
The 2D playing field, shown in Figure 1, is used to value prior to delivery to the DAC. This is accom-
define one period of any periodic function. It has plished by adding 32768 to the 2’s complement
two 16-bit axes, a horizontal phase axis ranging
32767
64
0
16384
128
192
255
8-bit table index
32767
49152
65535
16-bit phase axis
-32768
Figure 1. One Period of a Table Defined Sine Wave
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value. An efficient way to implement this operation
Calculated Waveforms
is to XOR the 2’s complement value with 0x8000.
Table Defined Waveforms
As mentioned above, waveform generation consists
of three stages before samples are written to the
DAC. The output of the first stage, which
determines the full scale output value, can either
result from a calculation or a table lookup. A
lookup table can be used if the output is not quickly
or easily calculated. The main trade-off is sampling
speed vs. code size.
Phase Error
Figure 1 shows one period of a sine wave. A
lookup table containing 256 samples of this
waveform is used to approximate a true sine wave.
Keep in mind that the lookup table can
approximate any other periodic waveform. If the
output is set to “sine wave” at the command
prompt, the Timer 4 ISR performs a lookup to
obtain the output, using the eight most significant
bits of the phase accumulator as the table index.
The truncation to 8-bits introduces an error which
can be interpreted as an instantaneous phase error
or a slight error in the waveform amplitude. The
frequency resolution, which is determined by the
16-bit accumulator, is not affected by the truncation
because the error is not accumulated across
multiple samples.
Amplitude Error
Amplitude error can be introduced from two
sources, a low resolution amplitude or phase axis.
Since the DAC has a 12-bit output resolution, error
resulting from the amplitude axis can be eliminated
by storing 16-bit values in the lookup table. Ampli-
tude error that results from the phase axis can only
be corrected by increasing the number of entries in
the lookup table. Increasing the number of table
entries will stabilize the instantaneous frequency
by reducing the phase error, at the expense of
increased code size.
Stage one of the Timer 4 ISR calculates the full
scale output value of the waveform corresponding
to the 16-bit phase accumulator. Since using the
full 16-bit precision of the phase accumulator in the
calculation does not require many clock cycles,
both the amplitude and phase error are less than in
table-defined waveforms.
Square Wave
The algorithm used to calculate the output value of
the square wave is quite simple. As shown in
Figure 2, if the phase accumulator is in the first half
of the cycle, then the output is set to the maximum
value of +32767. Otherwise, the output is set to the
minimum value (-32768). The most significant bit
of the phase accumulator contains enough informa-
tion to determine the output value of the square
wave.
Triangle Wave
The calculation of a triangle wave involves the
equation of 2 lines with opposite slope. From
Figure 3, the slope is +2 in the first half and -2 in
the second half.
Saw Tooth Wave
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The equation of a saw tooth wave is a straight line
with a slope of 1. Figure 4 shows one period of a
full scale saw tooth wave.
32767
0
32767
16384
32767
49152
65535
-32768
0
16384
32767
49152
65535
Figure 3. One period of a calculated
triangle wave
-32768
Figure 2. One period of a calculated
square wave
32767
0
16384
32767
49152
65535
-32768
Figure 4. One period of a calculated
saw tooth wave
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Software Example
//-----------------------------------------------------------------------------
// DAC1_fgen1.c
//-----------------------------------------------------------------------------
//
// AUTH: BW,FB
// DATE: 2 OCT 01
//
// Target: C8051F02x
// Tool chain: KEIL C51
//
// Description:
//
Example source code which outputs waveforms on DAC1. DAC1’s output is
//
scheduled to update at a rate determined by the constant
//
<SAMPLE_RATE_DAC>, managed and timed by Timer4.
//
//
Implements a 256-entry full-cycle sine table of 16-bit precision. Other
//
waveforms supported are square, triangle, and saw tooth.
//
//
The output frequency is determined by a 16-bit phase adder.
//
At each DAC update cycle, the phase adder value is added to a running
//
phase accumulator, <phase_accumulator>, the upper bits of which are used
//
to access the sine lookup table.
//
//
The program is controlled through UART using HyperTerminal running on a
//
PC. All commands are two characters in length and have optional
//
frequency and amplitude arguments. Note that the amplitude parameter
//
cannot be specified unless the frequency is also specified.
//
//
Command Format:
//
//
XX [frequency] [amplitude]
//
//
where XX denotes the command
//
//
Command List:
//
//
SQ - Square Wave
//
SI - Sine Wave
//
TR - Triangle Wave
//
SA - Saw Tooth Wave
//
OF - Output OFF
//
?? - Help
//-----------------------------------------------------------------------------
// Includes
//-----------------------------------------------------------------------------
#include
#include
#include
#include
#include
<c8051f020.h>
<stdio.h>
<string.h>
<ctype.h>
<stdlib.h>
// SFR declarations
//-----------------------------------------------------------------------------
// 16-bit SFR Definitions for ‘F02x
//-----------------------------------------------------------------------------
Rev. 1.1
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