TB62709NG/FG
TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB62709NG,TB62709FG
7−SEGMENT DRIVERS WITH BUILT−IN DECODERS
(COMMON ANODE CAPABILITY, MAXIMUM 4−DIGIT CONTROL)
The TB62709NG and TB62709FG are multifunctional, compact,
7−segment LED display drivers.
These ICs can directly drive 7−segment displays and individual
LEDs, and can control either a 4−digit display with decimal
points, or 32 individual LEDs.
These ICs can also be used with common−anode displays. Their
outputs are constant current, the ampere levels at which are set
using an external resistor.
A synchronous serial port connects the IC to the CPU.
The different modes of control provided by this device including
Duty Control Register Set, Digit Set, Decode Set and Standby Set,
are all based on every 16−bit of serial data.
The suffix (G) appended to the part number represents a
Lead(Pb)-Free product.
TB62709NG
TB62709FG
FEATURES
Control circuit power supply
: V
DD
= 4.5 to 5.5 V
Digit output rating
: 17 V /
−400
mA
Decoder output rating
: 17 V / 50 mA
Built−in decoder
: Decodes the numerals 0 to 9, certain alphabetic
characters, and of course blanks code.
Digit control function
: Can scan digit outputs DIG−0 to DIG−3 when connected
to the common anode pins of a 7−segment display.
Maximum transmission frequency
: f
CLK
= 15 MHz
Decoder outputs (OUT−A to OUT−Dp)
Output current can be set up to a 40mA maximum using an external resistor.
Constant current tolerance (Ta = 25°C, V
DD
= 5.0 V)
: Variation between bits = ±7%, variation between devices
(including variation between bits) = ±15% at V
CE
≥
0.7 V
Package
: 24−pin SDIP (SDIP24−P−300−1.78)
24−pin SSOP (SSOP24−P−300−1.00)
Weight
SDIP24-P-300-1.78 : 1.62 g (typ.)
SSOP24-P-300-1.00 : 0.32 g (typ.)
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TB62709NG/FG
PIN ASSIGNMENT
(Top view)
BLOCK DIAGRAM
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TB62709NG/FG
PIN FUNCTIONS
PIN NUMBER
1
2
3
PIN NAME
V
DD
DATA−IN (DI)
CLOCK (CK)
5 V power pin.
Serial data input pin.
Clock input pin. The shift register shifts data on the clock's rising edge.
Load signal input pin. The data in the D
8
to D
15
are read on the rising edge and the current
load register the is selected from among the Duty Register, the Decode & Digit Register, or
Data Registers 0 to 3. The D
0
to D
7
bits of the 16−bit shift register contain data corresponding
to the same registers just described, which are read on the load signal's falling edge.
Segment drive output pins. The A to Dp outputs correspond to the seven segments. These
pins output constant sink current. Connect each of these pins to the corresponding LED's
cathode.
Ground pins, There are two which can be used to ground the output OUT−A to OUT−Dp pins.
Product test pin. In normal use, be sure to connect to ground.
Product test pin. In normal use, be sure to connect to ground.
Digit output pins. Each of these pins can control one of the four seven−segment digits in a
display.
These pins output the V
CC
pin voltage as a source current output. Connect these pins to the
LED anodes.
Power pin for digit output.
Current setting pin for the OUT−A to OUT−Dp pins. Connect a resistor between this pin and
ground when setting the current.
Serial data output pin. Use when TB62709NG or TB62709FG devices are used in cascade
connections.
Ground pin for logic and analog circuits.
FUNCTION
4
LOAD (LD)
5~12
13, 21
14
15
OUT−A to
OUT−Dp
P−GND
TEST−IN2
TEST−IN1
16, 17, 19, 20
DIG−0 to DIG−3
18
22
23
24
V
CC
R−EXT
DATA−OUT (DO)
L−GND
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TB62709NG/FG
TIMING DIAGRAM
DATA INPUT
Transfer data to the DATA−IN pin on every 16−bit combining address (8bits) and data (8bits). After the 16
th
clock signal input following this data transfer input a load signal from the LD pin.
Input the load signal using an Active High pulse. The register address is set on the rising edge of the load pulse.
On the subsequent falling edge, the data are read as data of the mode of the register.
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TB62709NG/FG
DESCRIPTION OF OPERATION
Data input (DATA−IN, CLOCK, LOAD)
The data are input serially using the DATA−IN pin. The data input interface consists of a total of three
inputs : DATA−IN, LOAD, and CLOCK.
Binary code stored in the 16−bit shift register offers control modes including duty Control Register Set, Digitset,
Decode Set, and Standby Set,
The data are shifted on the rising edge of the clock, starting from the MSB. Cascade−connecting TB62709NG or
TB62709FG devices provides capability for controlling a larger number of digits.
The serial data in the 16−bit shift register are used as follows : the four bits D
15
(MSB) to D
12
select the IC
operating mode (Table 1), while D11 to D
8
select the register corresponding to the operating mode (Table 2).
Bits D
7
to D
0
(LSB) of the 16−bit shift register are used for detail settings, such as number of digits in use,
character settings in each digit, and light intensity.
The internal registers are loaded on the rising edge of the LOAD signal, which causes loading of data from an
external source into the D
15
(MSB) to D8 bits of the shift register, operating mode and the corresponding
register selection data. On the subsequent falling edge, the detail setting data of D
7
to D0 (LSB) are loaded.
Normally LOAD is Low. After a serial transfer of 16bits, the input of a High−level pulse loads the data.
Note the following caution : Use the D
15
to D
8
setting and the D
7
to D
0
detail data setting as a pair. If only the
D
7
to D
0
data are input without setting D
15
to D
8
an error condition may result, in which the device will not
operate normally. If the current mode is set again by a new signal, the data for D
15
to D
8
must also be re−input.
Operating precautions
At power−on or after operation in Clear mode (in initial state), set the IC to Normal mode again. Otherwise, the
IC will not drive the LED.
Operating the IC in Blank mode (all lights off) or in All On mode (all lights lit) does not affect the internal data.
Setting the IC to Normal mode again continues the LED lighting in the state governed by the settings made
immediately before mode change.
Normal mode (not Shut Down, Clear, Blank, or All On mode) continues the operations set in Load Register
mode. In Normal mode, operations are governed by any new settings made in the Load Register, as soon as the
changed setting values are loaded.
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