VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 990 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case B-PUK (TO-200AC)
• Designed and qualified for industrial level
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
TYPICAL APPLICATIONS
B-PUK (TO-200AC)
• DC motor controls
• Controlled DC power supplies
• AC controllers
PRIMARY CHARACTERISTICS
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
Package
Circuit configuration
990 A
800 V, 1200 V, 1400 V, 1600 V,
1800 V, 2000 V
1.62 V
100 mA
-40 °C to +125 °C
B-PUK (TO-200AC)
Single SCR
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
V
DRM
/V
RRM
t
q
T
J
Typical
T
hs
T
hs
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
990
55
2000
25
17 800
18 700
1591
1452
800 to 2000
150
-40 to 125
UNITS
A
°C
A
°C
A
kA
2
s
V
μs
°C
VOLTAGE RATINGS
TYPE
NUMBER
VOLTAGE
CODE
08
12
VS-ST730CL
14
16
18
20
V
RSM
, MAXIMUM
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE
V
V
800
1200
1400
1600
1800
2000
900
1300
1500
1700
1900
2100
80
I
DRM
/I
RRM
MAXIMUM AT
T
J
= T
J
MAXIMUM
mA
Revision: 28-Sep-17
Document Number: 94414
1
For technical questions within your region:
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
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VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
VALUES
990 (375)
55 (85)
2000
17 800
18 700
15 000
Sinusoidal half wave,
initial T
J
= T
J
maximum
15 700
1591
1452
1125
1027
15 910
0.98
1.12
0.32
0.27
1.62
600
1000
kA
2
s
V
m
V
mA
kA
2
s
A
UNITS
A
°C
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 2000 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
SWITCHING
PARAMETER
Maximum non-repetitive rate of rise
of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
Gate drive 20 V, 20
,
t
r
1 μs
T
J
= T
J
maximum, anode voltage
80 % V
DRM
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
I
TM
= 750 A, T
J
= T
J
maximum, dI/dt = 60 A/μs,
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
,
t
p
= 500 μs
VALUES
1000
1.0
μs
150
UNITS
A/μs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
VALUES
500
80
UNITS
V/μs
mA
Revision: 28-Sep-17
Document Number: 94414
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, t
p
5 ms
T
J
= -40 °C
DC gate current required to trigger
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
DC gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
DC gate current not to trigger
I
GD
T
J
= T
J
maximum
DC gate voltage not to trigger
V
GD
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
DRM
anode to
cathode applied
Maximum required gate
trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
200
100
50
2.5
1.8
1.1
10
VALUES
Typ.
Max.
UNITS
10.0
2.0
3.0
20
5.0
-
200
-
-
3.0
-
W
A
V
mA
V
mA
0.25
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating junction temperature range
Maximum storage temperature range
Maximum thermal resistance, junction to heatsink
SYMBOL
T
J
T
Stg
R
thJ-hs
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.073
0.031
0.011
0.006
14 700
(1500)
255
See dimensions - link at the end of datasheet
N
(kg)
g
K/W
UNITS
°C
Maximum thermal resistance, case to heatsink
Mounting force, ± 10 %
Approximate weight
Case style
R
thC-hs
B-PUK (TO-200AC)
R
thJ-hs
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
SINGLE SIDE
0.009
0.011
0.014
0.020
0.036
DOUBLE SIDE
0.009
0.011
0.014
0.020
0.036
RECTANGULAR CONDUCTION
SINGLE SIDE
0.006
0.010
0.015
0.021
0.036
DOUBLE SIDE
0.006
0.011
0.015
0.021
0.036
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJ-hs
when devices operate at different conduction angles than DC
Revision: 28-Sep-17
Document Number: 94414
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Heatsink T
emperat ure (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
400
800
30°
60°
90°
120°
180°
DC
1200 1600 2000 2400
Conduction Period
Maximum Allowa ble Heatsink T
emperature (°C)
130
120
110
100
90
80
70
60
50
40
0
100
200
S 730C..L S
T
eries
(S
ingle S Cooled)
ide
R
thJ-hs
(DC) = 0.073 K/ W
S 730C..L S
T
eries
(Double S
ide Cooled)
R
thJ-hs
(DC) = 0.031 K/ W
Conduction Angle
30°
60°
90°
120°
180°
300
400
500
600 700
Average On-s
tate Current (A)
Average On-state Current (A)
Fig. 1 - Current Ratings Characteristics
Maximum Allowable Heatsink T
emperature (°C)
Maximum Average On-state Power Loss (W)
Fig. 4 - Current Ratings Characteristics
2500
180°
120°
90°
60°
30°
130
120
110
100
90
80
70
60
50
40
30
20
0
200
30°
S 730C..L S
T
eries
(S
ingle S
ide Cooled)
R
thJ-hs
(DC) = 0.073 K/ W
2000
RMS Limit
1500
Conduc tion Period
1000
Conduc tion Angle
60°
90°
120°
180°
400
600
800
DC
1000 1200
500
S 730C..L Series
T
T
J
= 125°C
0
200
400
600
800 1000 1200 1400
0
Average On-state Current (A)
Average On-state Current (A)
Fig. 2 - Current Ratings Characteristics
Maximum Average On-s
tate Power Los (W)
s
Fig. 5 - On-State Power Loss Characteristics
3500
3000
2500
2000
RMS Limit
1500
Conduction Period
Maximum Allowable Heatsink T
emperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
200
400
30°
S 730C..L S
T
eries
(Double S
ide Cooled)
R
thJ-hs
(DC) = 0.031 K/ W
DC
180°
120°
90°
60°
30°
Conduction Angle
1000
500
0
0
400
800
1200 1600 2000 2400
Average On-state Current (A)
S 730C..L S
T
eries
T = 125°C
J
60°
90°
120°
180°
600
800 1000 1200 1400
Fig. 3 - Current Ratings Characteristics
Fig. 6 - On-State Power Loss Characteristics
Revision: 28-Sep-17
Document Number: 94414
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
Peak Half S Wave On-state Current (A)
ine
18000
17000
Maximum Non R
epetitive S
urge Current
Versus Pulse T
rain Duration. Control
16000 Of Conduc tion May Not Be Maintained.
Initial T = 125°C
J
15000
No Voltage Reapplied
R
ated V
RRM
Reapplied
14000
13000
12000
11000
10000
9000
8000
S 730C..L S
T
eries
Peak Half S Wave On-state Current (A)
ine
16000
15000
14000
13000
12000
11000
10000
9000
8000
7000
1
At Any Rated Load Condition And With
Rated V
RRM
Applied Following S
urge.
Initial T = 125°C
J
@60 Hz 0.0083 s
@50 Hz 0.0100 s
S 730C..L S
T
eries
10
100
7000
0.01
0.1
Pulse T
rain Duration (s)
1
Numb er Of Equal Amplitude Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
Instantaneous On-state Current (A)
T = 25°C
J
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
T = 125°C
J
1000
S 730C..L S
T
eries
100
0.5
1
1.5
2
2.5
3
3.5
Instantaneous On-state Voltage (V)
Fig. 9 - On-State Voltage Drop Characteristics
0.1
S
teady S
tate Value
R
thJ-hs
= 0.073 K/ W
(S
ingle S
ide Cooled)
R
thJ-hs
= 0.031 K/ W
(Double S Cooled)
ide
0.01
(DC Operation)
T
ransient T
hermal Impedance Z
thJ-hs
(K/ W)
S 730C..L S
T
eries
0.001
0.001
0.01
0.1
S
quare Wave Pulse Duration (s)
1
10
Fig. 10 - Thermal Impedance Z
thJ-hs
Characteristics
Revision: 28-Sep-17
Document Number: 94414
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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