IDT7134LA55CB datasheet, PDF - EEWORLD Datasheet

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IDT7134LA55CB: Description4K X 8 DUAL-PORT SRAM, 55 ns, PDIP48; Categorystorage; File Size149KB，11 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT7134LA55CB Overview

4K X 8 DUAL-PORT SRAM, 55 ns, PDIP48

IDT7134LA55CB Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	48
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
maximum access time	55 ns
Processing package description	Plastic, DIP-48
state	ACTIVE
Craftsmanship	CMOS
packaging shape	Rectangle
Package Size	IN-line
Terminal form	THROUGH-hole
Terminal spacing	2.54 mm
terminal coating	tin lead
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
memory width	8
organize	4K × 8
storage density	32768 deg
operating mode	ASYNCHRONOUS
Number of digits	4096 words
Number of digits	4K
Memory IC type	dual-port static random access memory
serial parallel	parallel

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HIGH-SPEED

4K x 8 DUAL-PORT

STATIC SRAM

Features

High-speed access

Military: 25/35/45/55/70ns (max.)

Industrial: 55ns (max.)

Commercial: 20/25/35/45/55/70ns (max.)

Low-power operation

IDT7134SA

Active: 700mW (typ.)

Standby: 5mW (typ.)

IDT7134LA

Active: 700mW (typ.)

Standby: 1mW (typ.)

Fully asynchronous operation from either port

Battery backup operation2V data retention

TTL-compatible; single 5V (±10%) power supply

Available in 48-pin DIP, LCC, Flatpack and 52-pin PLCC

Military product compliant to MIL-PRF-38535 QML

Industrial temperature range (40°C to +85°C) is available for

selected speeds

IDT7134SA/LA

Description

The IDT7134 is a high-speed 4K x 8 Dual-Port Static RAM

designed to be used in systems where on-chip hardware port arbitration

is not needed. This part lends itself to those systems which cannot

tolerate wait states or are designed to be able to externally arbitrate or

withstand contention when both sides simultaneously access the

same Dual-Port RAM location.

The IDT7134 provides two independent ports with separate control,

address, and I/O pins that permit independent, asynchronous access

for reads or writes to any location in memory. It is the users responsibility

to ensure data integrity when simultaneously accessing the same

memory location from both ports. An automatic power down feature,

controlled by

CE,

permits the on-chip circuitry of each port to enter a

very low standby power mode.

Fabricated using IDTs CMOS high-performance technology, these

Dual-Port typically operate on only 700mW of power. Low-power (LA)

versions offer battery backup data retention capability, with each port

typically consuming 200µW from a 2V battery.

The IDT7134 is packaged on either a sidebraze or plastic 48-pin

DIP, 48-pin LCC, 52-pin PLCC and 48-pin Flatpack. Military grade

product is manufactured in compliance with the latest revision of MIL-

PRF-38535 QML, making it ideally suited to military temperature

applications demanding the highest level of performance and reliability.

Functional Block Diagram

R/W

I/O

- I/O

COLUMN

I/O

COLUMN

I/O

- I/O

- A

11L

LEFT SIDE

ADDRESS

DECODE

LOGIC

MEMORY

ARRAY

RIGHT SIDE

ADDRESS

DECODE

LOGIC

- A

11R

2720 drw 01

JUNE 1999

DSC-2720/9

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